XMEGAD datasheet(22/309 Pages) ATMEL

22 / 309 page

8210B–AVR–04/10

XMEGA D

OUT instructions can address I/O memory locations in the range 0x00 - 0x3F directly. In the

address range 0x00 - 0x1F, specific bit manipulating and checking instructions are available.

The I/O memory definition for an XMEGA device is shown in "Register Summary" in the device

datasheet.

4.8.1

General Purpose I/O Registers

The lowest 16 I/O Memory addresses is reserved for General Purpose I/O Registers. These reg-

isters can be used for storing information, and they are particularly useful for storing global

variables and flags, as they are directly bit-accessible using the SBI, CBI, SBIS, and SBIC

instructions.

4.9

Memory Timing

Read and write access to the I/O Memory takes one CPU clock cycle. Write to SRAM takes one

cycle and read from SRAM takes two cycles. EEPROM page load (write) takes one cycle and

three cycles are required for read. For burst read, new data is available every second cycle.

External memory has multi-cycle read and write. The number of cycles depends on type of

memory.

4.10

Device ID

Each device has a three-byte device ID which identifies the device. These registers identify

Atmel as the manufacturer of the device and the device type. A separate register contains the

revision number of the device.

4.11

IO Memory Protection

Some features in the device is regarded to be critical for safety in some applications. Due to this,

it is possible to lock the IO register related to the Event System and the Advanced Waveform

Extensions. As long as the lock is enabled, all related IO registers are locked and they can not

be written from the application software. The lock registers themselves are protected by the

Configuration Change Protection mechanism, for details refer to ”Configuration Change Protec-

tion” on page 12.

4.12

4.12.1

ADDR2 - Non-Volatile Memory Address Register 2

The ADDR2, ADDR1 and ADDR0 registers represents the 24-bit value ADDR.

• Bit 7:0 - ADDR[23:16]: NVM Address Register Byte 2

This register gives the data value byte 2 when accessing application and boot section.

Bit

+0x02

ADDR[23:16]

ADDR2

Read/Write

R/W

Initial Value

XMEGAD Datasheet(PDF) 22 Page - ATMEL Corporation

XMEGAD Datasheet(HTML) 22 Page - ATMEL Corporation

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL