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XMEGAD Datasheet(PDF) 28 Page - ATMEL Corporation |
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XMEGAD Datasheet(HTML) 28 Page - ATMEL Corporation |
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28 / 309 page ![]() 28 8210B–AVR–04/10 XMEGA D 4.13 Register Description – Fuses and Lockbit 4.13.1 FUSEBYTE1 - Non-Volatile Memory Fuse Byte1 - Watchdog Configuration • Bit 7:4 - WDWPER[3:0]: Watchdog Window Timeout Period The WDWPER fuse bits are used to set initial value of the closed window for the Watchdog Timer in Window Mode. During reset these fuse bits are automatically written to the WPER bits Watchdog Window Mode Control Register, refer to Section 11.7.2 ”WINCTRL – Window Mode Control Register” on page 120 for details. • BIT 3:0 - WDPER[3:0]: Watchdog Timeout Period The WDPER fuse bits are used to set initial value of the Watchdog Timeout Period. During reset these fuse bits are automatically written to the PER bits in the Watchdog Control Register, refer to Section 11.7.1 ”CTRL – Watchdog Timer Control Register” on page 119 for details. 4.13.2 FUSEBYTE2 - Non-Volatile Memory Fuse Byte2 - Reset Configuration • Bit 7 - Reserved This fuse bit is reserved. For compatibility with future devices, always write this bit to one when this register is written. • Bit 6 - BOOTRST: Boot Loader Section Reset Vector The BOOTRST fuse can be programmed so the Reset Vector is pointing to the first address in the Boot Loader Flash Section. In this case, the device will start executing from the from Boot Loader Flash Section after reset. • Bit 5:2 - Reserved These fuse bits are reserved. For compatibility with future devices, always write these bits to one when this register is written. Bit 7 6 5432 10 +0x01 WDWPER[3:0] WDPER[3:0] FUSEBYTE1 Read/Write R/W R/W R/W R/W R/W R/W R/W R/W Initial Value 0 0 0000 00 Bit 7 6 5 4 3210 +0x02 –BOOTRST – – – – BODPD[1:0] FUSEBYTE2 Read/Write R R/W R R R R R/W R/W Initial Value 1 1 1 1 1111 Table 4-1. Boot Reset Fuse BOOTRST Reset Address 0 Reset Vector = Boot Loader Reset 1 Reset Vector = Application Reset (address 0x0000) |
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