XMEGAD datasheet(29/309 Pages) ATMEL

29 / 309 page

8210B–AVR–04/10

XMEGA D

• Bit 1:0 - BODPD[1:0]: BOD operation in power-down mode

The BODPD fuse bits set the BOD operation mode in all sleep modes except Idle mode.

For details on the BOD and BOD operation modes refer to ”Brown-Out Detection” on page 106.

4.13.3

FUSEBYTE4 - Non-Volatile Memory fuse Byte4 - Start-up Configuration

• Bit 7:5 - Reserved

These fuse bits are reserved. For compatibility with future devices, always write these bits to one

when this register is written.

• Bit: 4 - RSTDISBL - External Reset Disable

This fuse can be programmed to disable the external reset pin functionality. When this is done

pulling this pin low will not cause an external reset.

• Bit 3:2 - STARTUPTIME[1:0]: Start-up time

The STARTUPTIME fuse bits can be used to set at a programmable timeout period from all

reset sources are released and until the internal reset is released from the delay counter.

The delay is timed from the 1kHz output of the ULP oscillator, refer to Section 9.3 ”Reset

Sequence” on page 104 for details.

• Bit 1 - WDLOCK: Watchdog Timer lock

The WDLOCK fuse can be programmed to lock the Watchdog Timer configuration. When this

fuse is programmed the Watchdog Timer configuration cannot be changed, and the Watchdog

Timer cannot be disabled from the application software. When the WDLOCK fuse is pro-

grammed the the watchdog timer is automatically enabled at reset.

Table 4-2.

BOD operation modes in sleep modes

BODPD[1:0]

Description

Reserved

BOD enabled in sampled mode

BOD enabled continuously

BOD Disabled

Bit

+0x04

–

RSTDISBL

STARTUPTIME[1:0]

WDLOCK

–

FUSEBYTE4

Read/Write

R/W

Initial Value

Table 4-3.

Start-up Time

STARTUPTIME[1:0]

1kHz ULP oscillator Cycles

Reserved

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