XMEGAD datasheet(30/309 Pages) ATMEL

30 / 309 page

8210B–AVR–04/10

XMEGA D

• Bit 0 - Reserved

This fuse bit is reserved. For compatibility with future devices, always write this bit to one when

this register is written.

4.13.4

FUSEBYTE5 - Non-Volatile Memory Fuse Byte 5

• Bit 7:6 - Reserved

These fuse bits are reserved. For compatibility with future devices, always write these bits to one

when this register is written.

• Bit 5:4 - BODACT[1:0]: BOD operation in active mode

The BODACT fuse bits set the BOD operation mode when the device is in active and idle mode

of operation.

For details on the BOD and BOD operation modes refer to ”Brown-Out Detection” on page 84.

• Bit 3 - EESAVE: EEPROM memory is preserved through the Chip Erase

A chip erase command will normally erase the Flash, EEPROM and internal SRAM. If the

EESAVE fuse is programmed, the EEPROM is not erased during chip erase. In case EEPROM

is used to store data independent of software revision, the EEPROM can be preserved through

chip erase.

Table 4-4.

Watchdog Timer locking

WDLOCK

Description

Watchdog Timer locked for modifications

Watchdog Timer not locked

Bit

654

+0x05

–

BODACT[1:0]

EESAVE

BODLEVEL[2:0]

FUSEBYTE5

Read/Write

R/W

Initial Value

Table 4-5.

BOD operation modes in Active and Idle mode

BODACT[1:0]

Description

Reserved

BOD enabled in sampled mode

BOD enabled continuously

BOD Disabled

Table 4-6.

EEPROM memory through Chip Erase

EESAVE

Description

EEPROM is preserved during chip erase

EEPROM is not preserved during chip erase

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