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BT8376EPF Datasheet(PDF) 136 Page - Synaptics Incorporated.

Part # BT8376EPF
Description  single chip transceivers for T1/E1 and Integrated Service Digital Network (ISDN) primary rate interfaces
PDF  323 Pages
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Manufacturer  CONEXANT [Synaptics Incorporated.]
Direct Link  https://www.synaptics.com/
Logo CONEXANT - Synaptics Incorporated.

BT8376EPF Datasheet(HTML) 136 Page - Synaptics Incorporated.

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3.0 Registers
Bt8370/8375/8376
3.4 Interrupt Status Registers
Fully Integrated T1/E1 Framer and Line Interface
3-18
Conexant
N8370DSE
006—Error Interrupt Status (ISR5)
All events in ISR5 are from rising edge sources. Each event is latched active-high and held according to the
LATCH_ERR bit [addr 046] and triggers an interrupt if the corresponding IER5 bit is enabled [addr 00E].
TSLIP
Transmit Slip Error—Two types of TSLIP buffer errors are reported, TFSLIP or TUSLIP. The
error type is reported separately in slip status [SSTAT; 0D9].
0 = no error
1 = TSLIP error
RSLIP
Receive Slip Error—Two types of RSLIP buffer errors are reported, RFSLIP or RUSLIP. The
error type is reported separately in slip status [SSTAT; 0D9].
0 = no error
1 = RSLIP error
CKERR
CLAD Phase Detector or JCLK Acceleration Error—Reports JCLK acceleration/deceleration
(enabled by JAUTO bit; addr 002).
JERR
Jitter Attenuator Elastic Store Limit Error—Indicates the transmit (TJAT) or receive (RJAT)
jitter attenuator elastic store has under-run or overflowed its programmed depth [JSIZE;
addr 002]. Error type is reported separately in JMPTY [addr 021]. JAT elastic store is
automatically re-centered each time JERR occurs, causing an uncontrolled data slip on the
elastic store output.
0 = no error
1 = uncontrolled JAT data slip
CERR
CRC6/CRC4 Block Error—Applicable to ESF and MFAS modes only; read 0 in other modes.
CERR indicates 1 or more bit errors found in the received CRC-6 or CRC-4 checksum block
pattern.
0 = no error
1 = CRC error
SERR
CAS Pattern Error—Applicable only in E1 mode; read 0 in T1 mode. SERR indicates 1 or
more bit errors found in received TS16 Multiframe Alignment Signal (MAS).
0 = no error
1 = CAS error
MERR
MFAS Pattern Error—Applicable only in E1 mode; read 0 in T1 mode. Indicates 1 or more bit
errors found in received MFAS alignment pattern.
0 = no error
1 = MFAS error
FERR
Frame Error—Ft/Fs/T1DM/FPS/FAS Pattern Error. Indicates 1 or more Ft/Fs/FPS frame bit
errors or FAS pattern errors found. Refer to Table A-1 through A-7 for a description of which
frame bits are monitored according to the selected receive framer mode.
0 = no error
1 = frame error
7
6
5
4
3
2
1
0
TSLIP
RSLIP
CKERR
JERR
CERR
SERR
MERR
FERR
CKERR
JAUTO
JCLK Acceleration
X
0
CKERR disabled
01
No error
1
1
JCLK acceleration active



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