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BT8376EPF Datasheet(PDF) 233 Page - Synaptics Incorporated.

Part # BT8376EPF
Description  single chip transceivers for T1/E1 and Integrated Service Digital Network (ISDN) primary rate interfaces
PDF  323 Pages
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Manufacturer  CONEXANT [Synaptics Incorporated.]
Direct Link  https://www.synaptics.com/
Logo CONEXANT - Synaptics Incorporated.

BT8376EPF Datasheet(HTML) 233 Page - Synaptics Incorporated.

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Bt8370/8375/8376
Fully Integrated T1/E1 Framer and Line Interface
3.17 System Bus Registers
N8370DSE
Conexant
3-115
RSBI[1:0]
Receive Slip Buffer Interface mode—Selects configuration of RSLIP buffer. RSBI determines
total buffer depth and initial delay conditions. While RSLIP is bypassed, RCKO clocks RSB
outputs and RSBCKI is ignored. RFSYNC and RMSYNC are also ignored in Bypass mode if
they are programmed as inputs. RFSYNC and RMSYNC must be programmed as outputs if
RSB [1:0] selects either bypass or Elastic buffer mode.
0D2—RSB Sync Bit Offset (RSYNC_BIT)
OFFSET[2:0]
RSB Sync Bit Offset—Selects which RSB bit number coincides with RFSYNC and RMSYNC
sync pulses. Sync pulses are programmed to align to 1 bit in relation to RPCMO, RSIGO,
RINDO, and SIGFRZ time slots. If the sync pulses are desired to coincide with location of T1
F-bit or time slot 0 Bit 1, OFFSET is programmed to equal 0. Sync bit offset is added to time
slot offset [RSYNC_TS; addr 0D3] to form a 10-bit OFFSET value that applies to RFSYNC
location, which is then added to frame offset [RSYNC_FRM; addr 0D8]. This forms a 15-bit
OFFSET value that applies to the RMSYNC location. Both RFSYNC and RMSYNC offsets
are expressed as RSB.OFFSET, allowing the system to generate or accept sync pulses at any
bit location within the RSB multiframe.
RSBI
Mode
Total Depth
Initial Delay
Conditions
00
Normal
2 Frame
1 Frame
When RFSYNC is output
0.5 to 1.5 Frames
When RFSYNC is input
01
Short
2 Frame
32 Bits
Reverts to normal upon slip
10
Elastic
64 Bits
32 Bits
Recenters automatically upon slip
11
Bypass
0 Bits
0 Bits
RSBCKI ignored
NOTE(S):
To guarantee the pointer in the slip buffer is initialized properly during Elastic Mode, the
following procedure can be applied:
1.
Disable slip buffer
RSBI[1:0] = 11, RSB_CTR = 0
2.
Center slip buffer
RSBI[1:0] = 11, RSB_CTR = 0
3.
Set the slip buffer to Elastic Mode.
RSBI[1:0] = 10, RSB_CTR = 0
7
6
5
4
3
2
1
0
—————
OFFSET[2]
OFFSET[1]
OFFSET[0]
OFFSET[2:0]
RSYNC Location
000
Bit 1 or F-bit
001
Bit 2
||
110
Bit 7
111
Bit 8



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