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SC1100 Datasheet(PDF) 164 Page - National Semiconductor (TI) |
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SC1100 Datasheet(HTML) 164 Page - National Semiconductor (TI) |
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164 / 348 page  www.national.com 164 Revision 1.1 Core Logic Module (Continued) Table 5-28. ISA Legacy I/O Register Summary I/O Port Type Name Reference DMA Channel Control Registers (Table 5-43) 000h R/W DMA Channel 0 Address Register Page 265 001h R/W DMA Channel 0 Transfer Count Register Page 265 002h R/W DMA Channel 1 Address Register Page 265 003h R/W DMA Channel 1 Transfer Count Register Page 265 004h R/W DMA Channel 2 Address Register Page 265 005h R/W DMA Channel 2 Transfer Count Register Page 265 006h R/W DMA Channel 3 Address Register Page 265 007h R/W DMA Channel 3 Transfer Count Register Page 265 008h Read DMA Status Register, Channels 3:0 Page 265 Write DMA Command Register, Channels 3:0 Page 266 009h WO Software DMA Request Register, Channels 3:0 Page 266 00Ah W DMA Channel Mask Register, Channels 3:0 Page 267 00Bh WO DMA Channel Mode Register, Channels 3:0 Page 267 00Ch WO DMA Clear Byte Pointer Command, Channels 3:0 Page 267 00Dh WO DMA Master Clear Command, Channels 3:0 Page 267 00Eh WO DMA Clear Mask Register Command, Channels 3:0 Page 267 00Fh WO DMA Write Mask Register Command, Channels 3:0 Page 267 0C0h R/W DMA Channel 4 Address Register (Not used) Page 267 0C2h R/W DMA Channel 4 Transfer Count Register (Not Used) Page 267 0C4h R/W DMA Channel 5 Address Register Page 267 0C6h R/W DMA Channel 5 Transfer Count Register Page 267 0C8h R/W DMA Channel 6 Address Register Page 267 0CAh R/W DMA Channel 6 Transfer Count Register Page 268 0CCh R/W DMA Channel 7 Address Register Page 268 0CEh R/W DMA Channel 7 Transfer Count Register Page 268 0D0h Read DMA Status Register, Channels 7:4 Page 268 Write DMA Command Register, Channels 7:4 Page 268 0D2h WO Software DMA Request Register, Channels 7:4 Page 269 0D4h W DMA Channel Mask Register, Channels 7:4 Page 269 0D6h WO DMA Channel Mode Register, Channels 7:4 Page 269 0D8h WO DMA Clear Byte Pointer Command, Channels 7:4 Page 269 0DAh WO DMA Master Clear Command, Channels 7:4 Page 269 0DCh WO DMA Clear Mask Register Command, Channels 7:4 Page 269 0DEh WO DMA Write Mask Register Command, Channels 7:4 Page 269 DMA Page Registers (Table 5-44) 081h R/W DMA Channel 2 Low Page Register Page 270 082h R/W DMA Channel 3 Low Page Register Page 270 083h R/W DMA Channel 1 Low Page Register Page 270 087h R/W DMA Channel 0 Low Page Register Page 270 089h R/W DMA Channel 6 Low Page Register Page 270 08Ah R/W DMA Channel 7 Low Page Register Page 270 08Bh R/W DMA Channel 5 Low Page Register Page 270 08Fh R/W Sub-ISA Refresh Low Page Register Page 270 481h R/W DMA Channel 2 High Page Register Page 270 482h R/W DMA Channel 3 High Page Register Page 270 483h R/W DMA Channel 1 High Page Register Page 270 487h R/W DMA Channel 0 High Page Register Page 270 |
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