HC05 datasheet(40/232 Pages) MOTOROLA

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MOTOROLA

2-16

MC68HC05X16

Rev. 1

MODES OF OPERATION AND PIN DESCRIPTIONS

2.3.15

VPP1

The VPP1 pin is the output of the charge pump for the EEPROM1 array.

2.3.16

VRH

The VRH pin is the positive reference voltage for the A/D converter.

2.3.17

VRL

The VRL pin is the negative reference voltage for the A/D converter.

2.3.18

PA0 – PA7/PB0 – PB7/PC0 – PC7

These 24 I/O lines comprise ports A, B and C. The state of any pin is software programmable, and

all the pins are conﬁgured as inputs during power-on or reset.

Under software control the PC2 pin can output the internal E-clock (see Section 4.2).

Resistive pull downs are provided on port B and/or port C and can be enabled via a mask option

(see Section 1.2). Wired-OR interrupt capability is provided on all pins of port B (see

Section 10.2.3.3).

2.3.19

NWOI

This pin provides another wired-OR interrupt capability in addition to port B. Wired-OR interrupts

are requested when this pin is pulled high (if wired-OR interrupts are enabled), i.e. interrupt

sensitivity on this pin is complementary to sensitivity on the IRQ pin (see Table 10-3 in

Section 10.2.3.1). When this pin is not in use it is recommended that it be tied to VSS in noisy

conditions. It is not necessary to tie NWOI to VSS when there is a negligible amount of noise

present.

2.3.20

PD0/AN0–PD7/AN7

This 8-bit input only port (D) shares its pins with the A/D converter. When enabled, the A/D

converter uses pins PD0/AN0 – PD7/AN7 as its analog inputs. On reset, the A/D converter is

disabled which forces the port D pins to be input only port pins (see Section 9.5).

HC05 Datasheet(PDF) 40 Page - Motorola, Inc