HC05 datasheet(31/232 Pages) MOTOROLA

31 / 232 page

MC68HC05X16

Rev. 1

MOTOROLA

2-7

MODES OF OPERATION AND PIN DESCRIPTIONS

2.2.2

WAIT mode

The WAIT instruction places the MCU in a low power consumption mode, but WAIT mode

consumes more power than STOP mode. All CPU action is suspended and the watchdog is

disabled, but the timer, A/D and SCI and MCAN systems remain active and operate as normal (see

ﬂow chart in Figure 2-4). All other memory and registers remain unaltered and all parallel

input/output lines remain unchanged. The programming or erase mechanism of the EEPROM is

also unaffected, as well as the charge pump high voltage generator.

During WAIT mode the I-bit in the CCR is cleared to enable all interrupts. The INTE bit in the

miscellaneous register (Section 2.2.3.1) is not affected by WAIT mode. When any interrupt or reset

is sensed, the program counter vectors to the locations containing the start address of the interrupt

or reset service routine.

Any interrupt or reset condition causes the processor to exit WAIT mode.

If an interrupt exit from WAIT mode is performed, the state of the remaining systems will be

unchanged.

If a reset exit from WAIT mode is performed the entire system reverts to the disabled reset state.

Note:

The stacking corresponding to an eventual interrupt to leave WAIT mode will only be

executed when leaving WAIT mode.

HC05 Datasheet(PDF) 31 Page - Motorola, Inc