HC05 datasheet(46/232 Pages) MOTOROLA

46 / 232 page

MOTOROLA

3-4

MC68HC05X16

Rev. 1

MEMORY AND REGISTERS

3.5

EEPROM

The user EEPROM consists of 256 bytes of memory located from address $0100 to $01FF. 255

bytes are general purpose and 1 byte is used by the option register. The non-volatile EEPROM is

byte erasable.

An internal charge pump provides the EEPROM voltage (VPP1), which removes the need to supply

a high voltage for erase and programming functions. The charge pump is a capacitor/diode ladder

network which will give a very high impedance output of around 20-30 M

Ω. The voltage of the

charge pump is visible at the VPP1 pin. During normal operation of the device, where

programming/erasing of the EEPROM array will occur, VPP1 should never be connected to either

VDD or VSS as this could prevent the charge pump reaching the necessary programming voltage.

Where it is considered dangerous to leave VPP1 unconnected for reasons of excessive noise in a

system, it may be tied to VDD; this will protect the EEPROM data but will also increase power

consumption, and therefore it is recommended that the protect bit function is used for regular

protection of EEPROM data (see Section 3.5.5).

In order to achieve a higher degree of security for stored data, there is no capability for bulk or row

erase operations.

The EEPROM control register ($0007) provides control of the EEPROM programming and erase

operations.

Warning: The VPP1 pin should never be connected to VSS, as this could cause permanent

damage to the device.

3.5.1

EEPROM control register

WOIE — Wired-OR interrupt enable

This bit is used to enable wired-OR interrupts on the NWOI pin and on all port B pins which have

been programmed as inputs. Wired-OR interrupts can only be enabled if the WOI mask option is

selected (see Section 1.2). WOIE is forced to zero if this mask option is not selected. Power-on

reset clears the WOIE bit.

1 (set)

–

Wired-OR interrupts are enabled (provided that wired-OR interrupts

have been selected as a mask option).

0 (clear) –

Wired-OR interrupts are disabled.

Address

bit 7

bit 6

bit 5

bit 4

bit 3

bit 2

bit 1

bit 0

State

on reset

EEPROM/ECLK control

$0007

WOIE

CAF

ECLK E1ERA E1LAT E1PGM 0000 0000

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