HC05 datasheet(18/232 Pages) MOTOROLA

18 / 232 page

MOTOROLA

MC68HC05X16

Rev. 1

LIST OF FIGURES

Figure

Number

Page

Number

TITLE

7-10

SCI data clock timing diagram (M=1) ......................................................................7-13

8-1

PLM system block diagram .....................................................................................8-1

8-2

PLM output waveform examples .............................................................................8-2

8-3

PLM clock selection ................................................................................................8-4

9-1

A/D converter block diagram ...................................................................................9-2

9-2

Electrical model of an A/D input pin ........................................................................9-6

10-1

Reset timing diagram ............................................................................................10-1

10-2

RESET external RC pull-down ..............................................................................10-3

10-3

Watchdog system block diagram...........................................................................10-4

10-4

Interrupt ﬂow chart ................................................................................................10-8

11-1

Programming model ..............................................................................................11-1

11-2

Stacking order .......................................................................................................11-2

12-1

Timer relationship..................................................................................................12-5

13-1

64-pin QFP pinout .................................................................................................13-1

13-2

64-pin QFP mechanical dimensions .....................................................................13-2

A-1

MC68HC05X32 block diagram ............................................................................... A-2

A-2

Memory map of the MC68HC05X32 ...................................................................... A-3

A-3

Timer relationship................................................................................................... A-11

B-1

MC68HC705X32 block diagram ............................................................................. B-3

B-2

Memory map of the MC68HC705X32 .................................................................... B-5

B-3

Modes of operation ﬂow chart ................................................................................ B-15

B-4

Timing diagram with handshake............................................................................. B-18

B-5

Parallel EPROM loader timing diagram.................................................................. B-18

B-6

EPROM parallel bootstrap schematic diagram ...................................................... B-19

B-7

RAM load and execute schematic diagram ............................................................ B-21

B-8

Parallel RAM loader timing diagram ....................................................................... B-22

B-9

Timer relationship................................................................................................... B-27

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