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BT8376EPF Datasheet(PDF) 205 Page - Synaptics Incorporated. |
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BT8376EPF Datasheet(HTML) 205 Page - Synaptics Incorporated. |
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205 / 323 page ![]() Bt8370/8375/8376 Fully Integrated T1/E1 Framer and Line Interface 3.15 Bit-Oriented Protocol Registers N8370DSE Conexant 3-87 3 3.15 Bit-Oriented Protocol Registers Unused bits indicated by a dash (—) are reserved and should be written to 0. Writing to reserved bits has no effect. The Bit Oriented Protocol (BOP) transceiver sends and receives BOP messages, including ESF Yellow Alarm, which consists of repeated 16-bit patterns with an embedded 6-bit codeword. The BOP message channel is configured to operate over the same channel selected by the DL1 Time Slot Enable register [DL1_TS; addr 0A4]. Therefore, DL1 must be configured and enabled to allow BOP operation, as described in Table 3-22. The BOP message channel must be configured to operate over the FDL channel for BOP messages to convey Priority, Command, and Response codeword messages according to ANSI T1.403, Section 9.4.1. The precedence of transmitted BOP messages with respect to current DL1 transmit activity is configurable [TBOP_MODE; addr 0A0]. BOP messages can also be transmitted during E1 mode, although the 16-bit codeword pattern has not been adopted as an E1 standard. BOP message format: 0xxxxxx011111111 (transmitted right to left) [543210]6-bit codeword 0A0—Bit Oriented Protocol Transceiver (BOP) RBOP_START BOP Receiver Enable—When active, the BOP receiver searches the FDL channel for data that matches a 16-bit pattern in the form of 0xxxxxx011111111, where xxxxxx equals a 6-bit codeword. Otherwise, the BOP receiver is disabled. 0 = disabled 1 = BOP receiver enable Table 3-22. (Datalink Configuration Register Description) Datalink Configuration Registers Value Description DL1_TS [addr 0A4] 0x40 Enabling odd frames, Fbit(T1) DL1_BIT [addr 0A5] 0x00 Select bits to use in time slot. DL1_CTL [addr 0A6] 0x03 Select normal FIFO mode, FCS, Tx enabled, Rx enabled. RDL1_FFC [addr 0A7] 00###### ###### is the threshold for receiver FIFO near full. TDL1_FEC [addr 0AB] 00###### ###### is the threshold for transmit FIFO near empty. 7 6 5 4 3 2 1 0 RBOP_START RBOP_INTEG RBOP_LEN[1] RBOP_LEN[0] TBOP_LEN[1] TBOP_LEN[0] TBOP_MODE[1] TBOP_MODE[0] |
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