AD9166 datasheet(67/138 Pages) AD

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Data Sheet

AD9166

Rev. 0 | Page 67 of 138

START-UP SEQUENCE

Several steps are required to program the AD9166 to the proper

operating state after the device is powered up according to the

recommended power-up sequence (see the Power Sequencing

section).

The start-up sequence is divided into several steps, and is listed

in Table 42, Table 43, and Table 44, along with an explanation of

the purpose of each step. Private registers are reserved but

must be written for proper operation. Blank cells in Table 42 to

Table 44 mean that the value depends on the result as described

in the Description column.

The AD9166 is calibrated at the factory as part of the automatic

test program. The configure DAC start-up sequence loads the

factory calibration coefficients and configures some parameters

that optimize the performance of the DAC and the device clock

DLL (see Table 42). Run this sequence whenever the DAC is

powered down or reset.

The configure JESD204B sequence configures the SERDES

block and then brings up the links (see Table 43). First, run the

configure DAC start-up sequence, then run the configure

JESD204B sequence.

Follow the configure NCO sequence if using the NCO (see

Table 44). Note that the NCO can be used in NCO only mode

or in conjunction with synthesized data from the SERDES data

interface. Only one mode can be used at a time and this mode is

selected in the second step in Table 44. The configure DAC

start-up sequence is run first, then the configure NCO sequence.

Table 42. Configure DAC Start-Up Sequence After Power-Up

Value

Description

R/W

0x000

0x18

Configure the device for 4-wire serial port operation (optional: leave at the default of 3-wire SPI).

0x0D2

0x52

Reset internal calibration registers (private).

0x0D2

0xD2

Clear the reset bit for the internal calibration registers (private).

0x606

0x02

Configure the nonvolatile random access memory (NVRAM) (private).

0x607

0x00

Configure the NVRAM (private).

0x604

0x01

Load the NVRAM. Loads factory calibration factors from the NVRAM (private).

0x003, 0x004,

0x005, 0x006

N/A1

Optional. Read CHIP_TYPE, PROD_ID, Bits[15:0], PROD_GRADE, and DEV_REVISION from

0x604, Bit 1

0b1

Optional. Read the boot loader pass bit in Register 0x604, Bit 1 = 0b1 to indicate a completed boot

load (private)

0x058

0x03

Enable the band gap reference (private).

0x090

0x1E

Power up the device clock DLL.

0x080

0x00

Enable the clock receiver.

0x040

0x00

Enable the DAC bias circuits.

0x09E

0x85

Configure DAC analog parameters (private).

0x091

0xE9

Enable the device clock DLL.

0x092, Bit 0

0b1

Check DLL_STATUS; set Register 0x092, Bit 0 = 1 to indicate the DLL is locked to the device clock

input.

0x0E8

0x20

Enable calibration factors (private).

0x152, Bits[1:0]

Configure the DAC decode mode (0b00 = NRZ, 0b01 = mix mode, or 0b10 = RZ).

1 N/A means not applicable.

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