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AD9166 Datasheet(PDF) 100 Page - Analog Devices |
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AD9166 Datasheet(HTML) 100 Page - Analog Devices |
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100 / 138 page  AD9166 Data Sheet Rev. 0 | Page 100 of 138 Hex. Addr. Register Name Bit No. Bit Name Settings Description Reset Access 0x315 PHY_PRBS_TEST_EN [7:0] PHY_TEST_EN Enable PHY BER by ungating the clocks. 0x0 R/W 1 PHY test enable. 0 PHY test disable. 0x316 PHY_PRBS_TEST_CTRL 7 Reserved Reserved. 0x0 R [6:4] PHY_SRC_ERR_CNT 0x0 R/W 000 Report Lane 0 error count. 001 Report Lane 1 error count. 010 Report Lane 2 error count. 011 Report Lane 3 error count. 100 Report Lane 4 error count. 101 Report Lane 5 error count. 110 Report Lane 6 error count. 111 Report Lane 7 error count. [3:2] PHY_PRBS_PAT_SEL Select PRBS pattern for PHY BER test. 0x0 R/W 00 PRBS7. 01 PRBS15. 10 PRBS31. 11 Not used. 1 PHY_TEST_START Start and stop the PHY PRBS test. 0x0 R/W 0 Test not started. 1 Test started. 0 PHY_TEST_RESET Reset PHY PRBS test state machine and error counters. 0x0 R/W 0 Not reset. 1 Reset. 0x317 PHY_PRBS_TEST_ THRESHOLD_LOBITS [7:0] PHY_PRBS_THRESHOLD_LOBITS Bits[7:0] of the 24-bit threshold value set the error flag for PHY PRBS test. 0x0 R/W 0x318 PHY_PRBS_TEST_ THRESHOLD_MIDBITS [7:0] PHY_PRBS_THRESHOLD_MIDBITS Bits[15:8] of the 24-bit threshold value set the error flag for PHY PRBS test. 0x0 R/W 0x319 PHY_PRBS_TEST_ THRESHOLD_HIBITS [7:0] PHY_PRBS_THRESHOLD_HIBITS Bits[23:16] of the 24-bit threshold value set the error flag for PHY PRBS test. 0x0 R/W 0x31A PHY_PRBS_TEST_ERRCNT_ LOBITS [7:0] PHY_PRBS_ERR_CNT_LOBITS Bits[7:0] of the 24-bit reported PHY BER test error count from selected lane. 0x0 R 0x31B PHY_PRBS_TEST_ERRCNT_ MIDBITS [7:0] PHY_PRBS_ERR_CNT_MIDBITS Bits[15:8] of the 24-bit reported PHY BER test error count from selected lane. 0x0 R 0x31C PHY_PRBS_TEST_ERRCNT_ HIBITS [7:0] PHY_PRBS_ERR_CNT_HIBITS Bits[23:16] of the 24-bit reported PHY BER test error count from selected lane. 0x0 R 0x31D PHY_PRBS_TEST_STATUS [7:0] PHY_PRBS_PASS Each bit is for the corresponding lane. Report PHY BER test pass/fail for each lane. 0xFF R |
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