Electronic Components Datasheet Search
  English  ▼

X  

Preview PDF HTML

AD9166 Datasheet(PDF) 80 Page - Analog Devices

Part # AD9166
Description  DC to 9 GHz Vector Signal Generator
PDF  138 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Manufacturer  AD [Analog Devices]
Direct Link  http://www.analog.com
Logo AD - Analog Devices

AD9166 Datasheet(HTML) 80 Page - Analog Devices

Back Button AD9166 Datasheet HTML 76Page - Analog Devices AD9166 Datasheet HTML 77Page - Analog Devices AD9166 Datasheet HTML 78Page - Analog Devices AD9166 Datasheet HTML 79Page - Analog Devices AD9166 Datasheet HTML 80Page - Analog Devices AD9166 Datasheet HTML 81Page - Analog Devices AD9166 Datasheet HTML 82Page - Analog Devices AD9166 Datasheet HTML 83Page - Analog Devices AD9166 Datasheet HTML 84Page - Analog Devices Next Button
Zoom Inzoom in Zoom Outzoom out
 80 / 138 page
background image
AD9166
Data Sheet
Rev. 0 | Page 80 of 138
Hex.
Addr.
Register Name
Bit
No.
Bit Name
Settings
Description
Reset
Access
0x002
SPI_DEVCONF
[7:4] DEVSTATUS
Device status.
0x0
R/W
[3:2] CUSTOPMODE
Customer operating mode.
0x0
R/W
[1:0] SYSOPMODE
System operating mode.
0x0
R/W
0 Normal operation.
1 Low power operation.
2 Medium power standby.
3 Low power sleep.
0x003
SPI_CHIPTYPE
[7:0] CHIP_TYPE
Chip type.
0x0
R
0x004
SPI_PRODIDL
[7:0] PROD_ID[7:0]
Product ID.
0x0
R
0x005
SPI_PRODIDH
[7:0] PROD_ID[15:8]
Product ID.
0x0
R
0x006
SPI_CHIPGRADE
[7:4] PROD_GRADE
Product grade.
0x0
R
[3:0] DEV_REVISION
Device revision.
0x0
R
0x020
IRQ_ENABLE
[7:5] Reserved
Reserved.
0x0
R
4
EN_SYSREF_JITTER
Enable SYSREF± jitter interrupt.
0x0
R/W
0 Disable interrupt.
1 Enable interrupt.
3
EN_DATA_READY
Enable JESD204x receiver
ready (JRX_DATA_READY) low
interrupt.
0x0
R/W
0 Disable interrupt.
1 Enable interrupt.
2
EN_LANE_FIFO
Enable lane FIFO overflow/
underflow interrupt.
0x0
R/W
0 Disable interrupt.
1 Enable interrupt.
1
EN_PRBSQ
Enable PRBS imaginary error
interrupt.
0x0
R/W
0 Disable interrupt.
1 Enable interrupt.
0
EN_PRBSI
Enable PRBS real error
interrupt.
0x0
R/W
0 Disable interrupt.
1 Enable interrupt.
0x024
IRQ_STATUS
[7:5] Reserved
Reserved.
0x0
R
4
IRQ_SYSREF_JITTER
SYSREF± jitter is too big.
Writing 1 clears the status.
0x0
R/W
3
IRQ_DATA_READY
JRX_DATA_READY is low.
Writing 1 clears the status.
0x0
R/W
0 No warning.
1 Warning detected.
2
IRQ_LANE_FIFO
Lane FIFO overflow/under-
flow. Writing 1 clears the
status.
0x0
R/W
0 No warning.
1 Warning detected.
1
IRQ_PRBSQ
PRBS imaginary error. Writing
1 clears the status.
0x0
R/W
0 No warning.
1 Warning detected.
0
IRQ_PRBSI
PRBS real error. Writing 1
clears the status.
0x0
R/W
0 No warning.
1 Warning detected.
0x031
SYNC_LMFC_DELAY_FRAME
[7:5] Reserved
Reserved.
0x0
R
[4:0] SYNC_LMFC_DELAY_SET_FRM
Desired delay from rising edge
of SYSREF± input to rising
edge of LMFC in frames.
0x0
R/W



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100  ...More


Datasheet Download

Go To PDF Page


Link URL



Does ALLDATASHEET help your business so far?  [ DONATE ] 

About Alldatasheet   |   Advertisement   |   Contact us   |   Privacy Policy   |   Link to Datasheet    |   Link Exchange   |   Manufacturer List
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com