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PM5356 Datasheet(PDF) 41 Page - PMC-Sierra, Inc |
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PM5356 Datasheet(HTML) 41 Page - PMC-Sierra, Inc |
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41 / 307 page ![]() RELEASED S/UNI-622-MAX PMC-Sierra, Inc. PM5356 S/UNI-622-MAX DATASHEET PMC-1980589 ISSUE 6 SATURN USER NETWORK INTERFACE (622-MAX) PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA INC., AND FOR ITS CUSTOMERS’ INTERNAL USE 31 9.5 Microprocessor Interface Signals Pin Name Type Pin No. Function CSB Input C11 The active-low chip select (CSB) signal is low during S/UNI-622-MAX register accesses. When CSB is high, the RDB and WRB inputs are ignored. When CSB is low, the RDB and WRB are valid. CSB must be high when RSTB is low to properly reset the chip. If CSB is not required (i.e., registers accesses are controlled using the RDB and WRB signals only), CSB must be connected to an inverted version of the RSTB input. RDB Input B11 The active-low read enable (RDB) signal is low during S/UNI-622-MAX register read accesses. The S/UNI- 622-MAX drives the D[7:0] bus with the contents of the addressed register while RDB and CSB are low. WRB Input A11 The active-low write strobe (WRB) signal is low during a S/UNI-622-MAX register write accesses. The D[7:0] bus contents are clocked into the addressed register on the rising WRB edge while CSB is low. D[0] D[1] D[2] D[3] D[4] D[5] D[6] D[7] I/O B17 A17 C16 B16 C15 B15 A15 D14 The bi-directional data bus D[7:0] is used during S/UNI-622-MAX register read and write accesses. A[0] A[1] A[2] A[3] A[4] A[5] A[6] A[7] Input B14 A14 D13 C13 B13 A13 C12 B12 The address bus A[7:0] selects specific registers during S/UNI-622-MAX register accesses. |
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