PM5356 datasheet(45/307 Pages) PMC

45 / 307 page

RELEASED

S/UNI-622-MAX

PMC-Sierra, Inc.

PM5356

S/UNI-622-MAX

DATASHEET

PMC-1980589

ISSUE 6

SATURN USER NETWORK INTERFACE (622-MAX)

PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA INC., AND FOR ITS CUSTOMERS’ INTERNAL USE

9.8

Power and Ground

Pin Name

Type

No.

Function

VBIAS[0]

VBIAS[1]

Bias

Voltage

W20

E20

Digital input biases (VBIAS). When tied to +5V, the

VBIAS inputs are used to bias the wells of the digital

inputs so that the pads can tolerate up to 5V on their

inputs without forward biasing internal ESD protection

devices. When VBIAS are tied to +3.3V, the digital

inputs will only tolerate 3.3V level voltages.

The system interface inputs (RFCLK, RENB, TFCLK,

TENB, TDAT[15:0], TMOD, TERR, TSOC/TSOP,

TEOP and TPRTY) do not use the bias voltages and

are 3.3V tolerant only.

PBIAS[0]

PBIAS[1]

PBIAS[2]

PBIAS[3]

Bias

Voltage

PECL input biases (PBIAS). When tied to +5V, the

PBIAS inputs are used to bias the wells in the PECL

inputs and output so that the pads can tolerate up to

5V without forward biasing internal ESD protection

devices. When the PBIAS inputs are tied to +3.3V,

the pads will only tolerate 3.3V level voltages.

PBIAS[0]

REFCLK+/- Input

PBIAS[1]

RXD+/- Input

PBIAS[2]

RRCLK+/- Input

PBIAS[3]

TXD+/- Output

Please see the Operation section for detailed

information on PECL interfacing issues.

QAVD[0]

QAVD[1]

Analog

Power

The quiet power (QAVD) pins for the analog core.

QAVD should be connected to well-decoupled analog

+3.3V supply.

Please see the Operation section for detailed

information.

QAVS[0]

QAVS[1]

Analog

Ground

The quiet ground (QAVS) pins for the analog core.

QAVS should be connected to analog ground of the

QAVD supply.

Please see the Operation section for detailed

information.

PM5356 Datasheet(PDF) 45 Page - PMC-Sierra, Inc

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