PM5356 datasheet(91/307 Pages) PMC

91 / 307 page

RELEASED

S/UNI-622-MAX

PMC-Sierra, Inc.

PM5356

S/UNI-622-MAX

DATASHEET

PMC-1980589

ISSUE 6

SATURN USER NETWORK INTERFACE (622-MAX)

PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA INC., AND FOR ITS CUSTOMERS’ INTERNAL USE

APSRDI:

The APSRDI bit control the overwriting of the transmit path RDI values. When

APSRDI is set high, the RDI information on the APS[4:0] pins is transmitted

by TPOP. When APSRDI is set low, the RDI information from RPOP is

transmitted by TPOP. The APSOE bit must be set low when APSRDI is set

high.

APSFEBE

The APSFEBE bit controls the overwriting of the transmit path FEBE values.

When APSFEBE is set high, the FEBE information on the APS[4:0] pins is

transmitted by TPOP. When APSFEBE is set low, the FEBE information from

RPOP is transmitted by TPOP. The APSOE bit must be set low when

APSFEBE is set high.

APSI:

The APS FIFO interrupt indicates if the APS FIFO has underrun or overrun.

The APSI register is set high when a FIFO underrun or overrun has occurred

since the register was last read. The APSI register is set low when the

the APS FIFO is operating normally when configured for 1+1 APS operation.

APSFRST:

The APS FIFO Reset bit controls the four-byte FIFO which handles minor

phase variations between the parallel input clock PTCLK and the transmit

clock TCLK. When APSFRST is set high, the FIFO is held in reset. When

APSFRST is set low, the FIFO may be reset during system reset. The

APSFRST should be set high for at least 4 TCLK cycles when either S/UNI-

622-MAX devices in the 1+1 APS configuration are reset.

PM5356 Datasheet(PDF) 91 Page - PMC-Sierra, Inc