PM5356 datasheet(61/307 Pages) PMC

61 / 307 page

RELEASED

S/UNI-622-MAX

PMC-Sierra, Inc.

PM5356

S/UNI-622-MAX

DATASHEET

PMC-1980589

ISSUE 6

SATURN USER NETWORK INTERFACE (622-MAX)

PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA INC., AND FOR ITS CUSTOMERS’ INTERNAL USE

returned to the source node by signaling the corresponding Transmit Path

Overhead Processor in the local S/UNI-622-MAX to insert a path RDI indication.

The Pointer Interpreter detects path AIS in the incoming STS-12c/STM-4-4c

stream. PAIS is declared on entry to the AIS_state after three consecutive AIS

indications. The alarm condition reported in the receive alarm port and is

optionally returned to the source node by signaling the corresponding Transmit

Path Overhead Processor in the local SONET/SDH equipment to insert a path

RDI indication.

Invalid pointer indications (inv_point), invalid NDF codes, new pointer indications

(new_point), discontinuous change of pointer alignment, and illegal pointer

changes are also detected and reported by the Pointer Interpreter block via

enabled or NDF disabled definitions. The third occurrence of equal new_point

indications (3 x eq_new_point) is reported as a discontinuous change of pointer

alignment event (DISCOPA) instead of a new pointer event and the active offset

is updated with the receive pointer value. An illegal pointer change is defined as

a inc_ind or dec_ind indication that occurs within three frames of the previous

inc_ind, dec_ind or NDF_enable indications. Illegal pointer changes may be

optionally disabled via register bits.

The active offset value is used to extract the path overhead from the incoming

stream and can be read from an internal register.

SPE Timing

The SPE Timing Block provides SPE timing information to the Error Monitor and

the Extract blocks. The block contains a free running timeslot counter that is

initialized by a J1 byte identifier (which identifies the first byte of the SPE).

Control signals are provided to the Error Monitor and the Extract blocks to

identify the Path Overhead bytes and to downstream circuitry to extract the ATM

cell payload.

Error Monitor

The Error Monitor Block contains two 16-bit counters that are used to accumulate

path BIP-8 errors (B3), and far end block errors (FEBEs). The contents of the

two counters may be transferred to holding registers, and the counters reset

under microprocessor control.

Path BIP-8 errors are detected by comparing the path BIP-8 byte (B3) extracted

from the current frame, to the path BIP-8 computed for the previous frame.

PM5356 Datasheet(PDF) 61 Page - PMC-Sierra, Inc

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