AD9531 datasheet(60/88 Pages) AD

60 / 88 page

AD9531

Data Sheet

Control bit functions are active high and register address values are hexadecimal, unless otherwise noted.

SERIAL PORT CONTROL REGISTERS—REGISTER 0x0000 TO REGISTER 0x0005

Table 53. Serial Port Control Register Details

Address

Bits

Bit Name

Description

0x0000

Unused

Unused.

LSB first

Bit order for the SPI port.

0 (default): most significant bit first and, for multibyte transfers, most significant byte first with

autodecrement register addressing.

1: least significant bit first and, for multibyte transfers, least significant byte first with

autoincrement register addressing.

Soft reset

Software initiated reset. This bit restores register contents to the current ROM profile values.

[D4:D0]

Unused

Unused.

0x0004

[D7:D5]

Unused

Unused.

Hardware reset

Software initiated hardware reset. This bit resets the internal device hardware without

changing the current register contents. This bit does not autoclear; therefore, for proper device

operation, first write a Logic 1 then, a Logic 0.

[D3:D2]

Unused

Unused.

Reduce SPI strength

Alters the strength of the SPI port control pins. The default value for this bit resides in the ROM.

0: normal SPI strength.

1: reduced SPI strength.

Read buffer register

Read cycle target (SPI or buffered register(s)).

0 (default): read cycles apply to the SPI registers.

1: read cycles apply to the buffered registers.

0x0005

[D7:D1]

Unused

Unused.

I/O update

Software initiated input/output update. This is an autoclearing bit.

DEVICE IDENTIFICATION AND ROM PROFILE REGISTERS—REGISTER 0x000A TO REGISTER 0x000E

Table 54. Device Identification and ROM Profile Register Details

Address

Bits

Bit Name

Description

0x000A

[D7:D0]

Device ID [31:24]

Most significant byte of the device ID.

0x000B

[D7:D0]

Device ID [23:16]

Next byte of the device ID.

0x000C

[D7:D0]

Device ID [15:8]

Next byte of the device ID.

0x000D

[D7:D0]

Device ID [7:0]

Least significant byte of the device ID.

0x000E

[D7:D6]

Reserved

Reserved.

[D5:D0]

ROM profile

Reading this register provides the index value of the most recently loaded ROM profile. Writing to

the register selects one of 64 possible ROM profiles. The contents of this register are initially set at

power-up as described in the Multifunction Pins (LDET1/M1, LDET2/M2, LDET3/M3, LOR/M4)

section. Note that writing to this register loads the specified ROM profile, thereby updating the value of

all registers identified by ROM in the default column of the Register Map. The contents of a register

with ROM in the default column of the Register Map depend on the ROM profile number

identified by the bits in this register (see the ROM Profile Data section).

Rev. 0 | Page 60 of 88

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