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AD9531 Datasheet(PDF) 10 Page - Analog Devices |
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AD9531 Datasheet(HTML) 10 Page - Analog Devices |
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10 / 88 page ![]() AD9531 Data Sheet PLL1 Output Timing Skew Matrix (HSTL Mode) Entries in Table 8 are typical with units of pico seconds (ps) and only apply with a channel divider input frequency less than 650 MHz. Any blank cell shown in Table 8 indicates an empty space in the matrix. Table 8. OUT1_x1 Group 1A Group 1B Group 1C 0 1 2 3 4 5 6 7 8 9 0 20 20 20 100 100 100 100 100 100 1 20 20 100 100 100 100 100 100 2 20 100 100 100 100 100 100 3 100 100 100 100 100 100 4 20 20 20 100 100 5 20 20 100 100 6 20 100 100 7 100 100 8 20 9 1 OUT1_x refers to one of the 10 output channels associated with PLL1. PLL1 Output Timing Skew Matrix (CMOS Mode) Entries in Table 9 are typical with units of pico seconds (ps) and only apply with a channel divider input frequency less than 650 MHz. The typical pin load is 10 pF. Any blank cell shown in Table 9 indicates an empty space in the matrix. Table 9. OUT1_x1 Group 1A Group 1B Group 1C 0 1 2 3 4 5 6 7 8 9 0 20 20 20 100 100 100 100 100 100 1 20 20 100 100 100 100 100 100 2 20 100 100 100 100 100 100 3 100 100 100 100 100 100 4 20 20 20 100 100 5 20 20 100 100 6 20 100 100 7 100 100 8 20 9 1 OUT1_x refers to one of the 10 output channels associated with PLL1. PLL1 Output Isolation, Group to Group Table 10. Parameter Min Typ Max Unit Test Conditions/Comments GROUP TO GROUP ISOLATION Indicates the worst spur occurring in any channel of the noninterferer groups; all outputs of all groups are active and configured as HSTL Group 1A Interferer 65 dB Group 1A = 153.6 MHz, Group 1B = 122.88 MHz, Group 1C = 122.88 MHz Group 1B Interferer 64 dB Group 1A = 122.88 MHz, Group 1B = 153.6 MHz, Group 1C = 122.88 MHz Group 1C Interferer 66 dB Group 1A = 122.88 MHz, Group 1B = 122.88 MHz, Group 1C = 153.6 MHz Rev. 0 | Page 10 of 88 |
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