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AD9173 Datasheet(PDF) 69 Page - Analog Devices |
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AD9173 Datasheet(HTML) 69 Page - Analog Devices |
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69 / 144 page ![]() Data Sheet AD9173 START-UP SEQUENCE analog.com Rev. C | 69 of 144 Table 53. JESD204B Mode Setup R/W Register Bits Value Description 0b1 = dual-link mode. 2 0b0 Select Link 0 for setup. This bit selects the link QBD being paged. 0b0 = Link 0 (QBD0). 0b1 = Link 1 (QBD1). [1:0] 0b00 Keep links disabled until end of routine. W 0x475 [7:0] 0x09 Soft reset the JESD204B quad-byte deframer. W 0x453 7 SCR Set scrambling option for SERDES data. 0 = disable scrambling. 1 = enable scrambling. [4:0] L−1 Write the L value (in n − 1 notation) for the selected JESD_MODE. W 0x458 [7:5] SUBCLASSV For Subclass 0, set this bit to 0. For Subclass 1, set this bit to 1. [4:0] NP−1 Write the NP value (in n − 1 notation) for the selected JESD_MODE. W 0x475 [7:0] 0x01 Bring the JESD204B quad-byte deframer out of reset. W 0x300 If running in dual link mode, repeat writes for Link 1 as follows. If running in single-link mode, skip the remaining steps in this table. 3 LINK_MODE Corresponds to the mode selection made in Register 0x110. 0b0 = single-link mode. 0b1 = dual link mode. 2 0b1 Select Link 1 for setup. This bit selects which link QBD is being paged. 0b0 = Link 0 (QBD0). 0b1 = Link 1 (QBD1). [1:0] 0b00 Keep links disabled until end of routine. W 0x475 [7:0] 0x09 Soft reset the JESD204B quad-byte deframer. W 0x453 7 SCR Set scrambling option for SERDES data. 0 = disable scrambling. 1 = enable scrambling. W 0x458 [4:0] L−1 Write the L value (in n − 1 notation) for the selected JESD_MODE. [7:5] SUBCLASSV For Subclass 0, set this bit to 0. For Subclass 1, set this bit to 1. [4:0] NP−1 Write the NP value (in n − 1 notation) for the selected JESD_MODE. W 0x475 [7:0] 0x01 Bring the JESD204B quad-byte deframer out of reset. Table 54 lists optional registers to configure the channel datapaths if they are being configured for a specific application. If the channel datapaths are bypassed (CH_INTERP_MODE = 1 for 1× channel interpolation), Table 54 can be skipped in the start-up sequence. Table 54. Channel Datapath Setup: Digital Gain and Channel NCOs R/W Register Bits Value Description W 0x008 [5:0] CHANNEL_PAGE. Select the channels to be programmed at the same time (or repeat this block for each channel to independently program values). Bit x of this control corresponds to the Channel x datapath. W 0x146 [7:0] CHNL_GAIN[7:0]. Write LSBs of channel digital gain. Configure digital gain for selected channels in Paging Register 0x008. Calculation: CHNL_GAIN = 211 × 10(dBGain/20) where dBGain is the gain value in dB for the channel gain desired. W 0x147 [7:0] CHNL_GAIN[11:8]. Write MSBs of channel digital gain. Calculations shown in Register 0x146. W 0x130 6 Enable NCO for selected channels in paging Register 0x008. 0b0 = disable NCO. 0b1 = enable NCO. 2 Enable NCO modulus for selected channels in paging Register 0x008. 0b0 = disable NCO modulus. 0b1 = enable NCO modulus. 1 Select sideband from modulation result. |
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