AD9173 datasheet(29/144 Pages) AD

Part #	AD9173

Description	Dual, 16-Bit, 12.6 GSPS RF DAC with Channelizers

PDF	144 Pages

Scroll/Zoom	100%

Manufacturer	AD [Analog Devices]

Direct Link	http://www.analog.com

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29 / 144 page

Data Sheet

AD9173

SERIAL PORT OPERATION

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Rev. C | 29 of 144

the addresses are decremented. A new write cycle can always be

initiated by bringing CS high and then low again.

To prevent confusion and to ensure consistency between devices,

the chip tests the first nibble following the address phase, ignoring

the second nibble. This test is completed independently from the

LSB first bits and ensures that there are extra clock cycles following

the soft reset bits (Register 0x000, Bit 0 and Bit 7). This test of the

first nibble only applies when writing to Register 0x000.

Figure 44. Serial Register Interface Timing, MSB First, Register 0x000, Bit 6

and Bit 1 = 0

Figure 45. Serial Register Interface Timing, LSB First, Register 0x000, Bit 6

and Bit 1 = 1

Figure 46. Timing Diagram for Serial Port Register Read

Figure 47. Timing Diagram for Serial Port Register Write

AD9173 Datasheet(PDF) 29 Page - Analog Devices