AD9173 datasheet(91/144 Pages) AD

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Data Sheet

AD9173

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Rev. C | 91 of 144

Table 60. Register Details

Addr.

Name

Bits

Bit Name

Settings

Description

Reset

Access

The links drop and the SERDES clocks are reset. It

is recommended to set this bit high so that when a

synchronization rotation is performed, the SERDES

clocks realign properly.

The datapath automatically uses the soft on/off

functionality to turn on and off the datapath stream

during a synchronization rotation to avoid corrupted

data from being transmitted. Only use this feature if

the PA protection block is in use.

Both the SERDES clock reset and datapath soft on/off

feature are enabled.

0x03F

TX_ENABLE

[7:6]

RESERVED

Reserved.

0x0

R/W

TXEN_DATAPATH_

DAC1

Selects whether the datapath of DAC1 is muted when

the TXEN1 pin is brought low.

0x0

R/W

Datapath output is normal.

If TXEN1 = 0, the datapath output is immediately

zeroed. If TXEN1 = 1, the datapath outputs normal

operation.

TXEN_DATAPATH_

DAC0

Selects whether the datapath of DAC0 is muted when

the TXEN0 pin is brought low.

0x0

R/W

Datapath output is normal.

If TXEN0 = 0, the datapath output is immediately

zeroed. If TXEN0 = 1, the datapath outputs normal

operation.

[3:0]

RESERVED

Reserved.

0x0

R/W

0x050

CAL_CLK_DIV

[7:4]

RESERVED

Reserved

0x2

R/W

[3:0]

CAL_CLK_DIV

Calibration register control. Set these bits to 0xA for

optimized calibration setting.

0x8

R/W

0x051

CAL_CTRL

CAL_CTRL0

Calibration setting. Set this bit to 1.

0x1

R/W

Reset the calibration engine.

Enable the calibration routine.

[6:3]

RESERVED

Reserved.

0x0

R/W

[2:1]

CAL_CTRL1

Calibration mode selection. Set this bit field to

1 for optimized calibration mode. Paged by the

MAINDAC_PAGE bits in Register 0x008.

0x1

R/W

Set calibration control setting.

CAL_START

Start calibration. After starting calibration, do not write

to any register from Register 0x051 to Register 0x061

until Register 0x052, Bit 2 reads low (indicating that

the calibration is no longer active). Paged by the

MAINDAC_

0x0

R/W

PAGE bits in Register 0x008.

0x052

CAL_STAT

[7:3]

RESERVED

Reserved.

0x0

R/W

CAL_ACTIVE

Calibration active status flag. A readback of 1

indicates the calibration routine is still in progress.

This control is paged by the MAINDAC_PAGE bits in

0x0

CAL_FAIL_SEARCH

Calibration failure flag. A readback of 1 indicates the

calibration routine failed and is possibly not valid.

This control is paged by the MAINDAC_PAGE bits in

0x0

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