| Electronic Components Datasheet Search |
|
AD9173 Datasheet(PDF) 73 Page - Analog Devices |
|
|
|||||||||||||||||||||||||||||
AD9173 Datasheet(HTML) 73 Page - Analog Devices |
|
73 / 144 page ![]() Data Sheet AD9173 START-UP SEQUENCE analog.com Rev. C | 73 of 144 Table 57. Transport Layer Setup, Synchronization, and Enable Links R/W Register Bits Value Description 0b1 = dual-link mode. 2 0b0 Select Link 0 for setup. This bit selects which link QBD is being paged. 0b0 = Link 0 (QBD0). 0b1 = Link 1 (QBD1). [1:0] LINK_EN Enables the links. 0b01 = single-link mode 0b11 = dual-link mode. Table 58. Cleanup Registers R/W Register Bits Value Description W 0x1DE [7:0] 0x00 Disable analog SPI. To debug and continue readback capability, write 0x03. W 0x008 [7:0] 0xC0 Page all main DACs for TXEN control update. W 0x596 [7:0] 0x0C SPI turn on TXENx feature. |
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |