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HC05 Datasheet(PDF) 161 Page - Motorola, Inc |
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HC05 Datasheet(HTML) 161 Page - Motorola, Inc |
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161 / 232 page ![]() MC68HC05X16 Rev. 1 MOTOROLA 11-13 CPU CORE AND INSTRUCTION SET 11 11.3.8 Relative The relative addressing mode is only used in branch instructions. In relative addressing, the contents of the 8-bit signed byte (the offset) following the opcode are added to the PC if, and only if, the branch conditions are true. Otherwise, control proceeds to the next instruction. The span of relative addressing is from –126 to +129 from the opcode address. The programmer need not calculate the offset when using the Motorola assembler, since it calculates the proper offset and checks to see that it is within the span of the branch. EA = PC+2+(PC+1); PC ← EA if branch taken; otherwise EA = PC ← PC+2 11.3.9 Bit set/clear In the bit set/clear addressing mode, the bit to be set or cleared is part of the opcode. The byte following the opcode specifies the address of the byte in which the specified bit is to be set or cleared. Any read/write bit in the first 256 locations of memory, including I/O, can be selectively set or cleared with a single two-byte instruction. EA = (PC+1); PC ← PC+2 Address bus high ← 0; Address bus low ← (PC+1) 11.3.10 Bit test and branch The bit test and branch addressing mode is a combination of direct addressing and relative addressing. The bit to be tested and its condition (set or clear) is included in the opcode. The address of the byte to be tested is in the single byte immediately following the opcode byte (EA1). The signed relative 8-bit offset in the third byte (EA2) is added to the PC if the specified bit is set or cleared in the specified memory location. This single three-byte instruction allows the program to branch based on the condition of any readable bit in the first 256 locations of memory. The span of branch is from –125 to +130 from the opcode address. The state of the tested bit is also transferred to the carry bit of the condition code register. EA1 = (PC+1); PC ← PC+2 Address bus high ← 0; Address bus low ← (PC+1) EA2 = PC+3+(PC+2); PC ← EA2 if branch taken; otherwise PC ← PC+3 159 |
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