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HC05 Datasheet(PDF) 120 Page - Motorola, Inc |
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HC05 Datasheet(HTML) 120 Page - Motorola, Inc |
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120 / 232 page ![]() MOTOROLA 7-18 MC68HC05X16 Rev. 1 SERIAL COMMUNICATIONS INTERFACE 7 7.11.5 Baud rate register (BAUD) The baud rate register provides the means to select two different or equivalent baud rates for the transmitter and receiver. SCP1, SCP0 — Serial prescaler select bits These read/write bits determine the prescale factor, NP, by which the internal processor clock is divided before it is applied to the transmitter and receiver rate control dividers, NT and NR. This common prescaled output is used as the input to a divider that is controlled by the SCR0–SCR2 bits for the SCI receiver, and by the SCT0–SCT2 bits for the transmitter. SCT2, SCT1, SCT0 — SCI rate select bits (transmitter) These three read/write bits select the baud rates for the transmitter. The prescaler output is divided by the factors shown in Table 7-4. Address bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 State on reset SCI baud rate (BAUD) $000D SCP1 SCP0 SCT2 SCT1 SCT0 SCR2 SCR1 SCR0 00uu uuuu Table 7-3 First prescaler stage SCP1 SCP0 Prescaler division ratio (NP) 00 1 01 3 10 4 11 13 Table 7-4 Second prescaler stage (transmitter) SCT2 SCT1 SCT0 Transmitter division ratio (NT) 000 1 001 2 010 4 011 8 100 16 101 32 110 64 111 128 118 |
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