AD9173 datasheet(131/144 Pages) AD

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Data Sheet

AD9173

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Rev. C | 131 of 144

Table 60. Register Details

Addr.

Name

Bits

Bit Name

Settings

Description

Reset

Access

until the counter is reset by the user; otherwise, the

counter rolls over and continues counting. Counters

of each lane are addressed as follows:

Bit 2 = unexpected K character error (UEK).

Bit 1 = not in table error (NIT).

Bit 0 = bad disparity error (BDE).

0x494

ECNT_STAT4

[7:4]

RESERVED

Reserved.

0x0

LANE_ENA4

This output indicates if Lane 4 is enabled. This control

is paged by the LINK_PAGE control in Register

0x300.

0x0

[2:0]

ECNT_TCR4

Terminal count reached indicator of error counters for

Lane 4. This control is paged by the LINK_PAGE

control in Register 0x300. Set these bits to 1 when

the corresponding counter terminal count value of

0xFF is reached. If ECNT_TCHx is set, the terminal

count value for the corresponding counter is held

until the counter is reset by the user; otherwise, the

counter rolls over and continues counting. Counters

of each lane are addressed as follows:

0x0

Bit 2 = unexpected K character error (UEK).

Bit 1 = not in table error (NIT).

Bit 0 = bad disparity error (BDE).

0x495

ECNT_STAT5

[7:4]

RESERVED

Reserved.

0x0

LANE_ENA5

This output indicates if Lane 5 is enabled. This control

is paged by the LINK_PAGE control in Register

0x300.

0x0

[2:0]

ECNT_TCR5

Terminal count reached indicator of error counters for

Lane 5. This control is paged by the LINK_PAGE

control in Register 0x300. Set these bits to 1 when

the corresponding counter terminal count value of

0xFF is reached. If ECNT_TCHx is set, the terminal

count value for the corresponding counter is held

until the counter is reset by the user; otherwise, the

counter rolls over and continues counting. Counters

of each lane are addressed as follows:

0x0

Bit 2 = unexpected K character error (UEK).

Bit 1 = not in table error (NIT).

Bit 0 = bad disparity error (BDE).

0x496

ECNT_STAT6

[7:4]

RESERVED

Reserved.

0x0

LANE_ENA6

This output indicates if Lane 6 is enabled. This control

is paged by the LINK_PAGE control in Register

0x300.

0x0

[2:0]

ECNT_TCR6

Terminal count reached indicator of error counters for

Lane 6. This control is paged by the LINK_PAGE

control in Register 0x300. Set these bits to 1 when

the corresponding counter terminal count value of

0xFF is reached. If ECNT_TCHx is set, the terminal

count value for the corresponding counter is held

until the counter is reset by the user; otherwise, the

counter rolls over and continues counting. Counters

of each lane are addressed as follows:

0x0

Bit 2 = unexpected K character error (UEK).

Bit 1 = not in table error (NIT).

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