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HC05 Datasheet(PDF) 104 Page - Motorola, Inc |
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HC05 Datasheet(HTML) 104 Page - Motorola, Inc |
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104 / 232 page  MOTOROLA 7-2 MC68HC05X16 Rev. 1 SERIAL COMMUNICATIONS INTERFACE 7 Figure 7-1 Serial communications interface block diagram & & & & + + Internal bus SCI interrupt Transmit Receive TDO pin RDI Transmitter control Receiver control clock Clock extraction phase and polarity control pin Receiver clock Transmitter Flag control data register data register TIE TCIE RIE ILIE TE RE SBK RWU 7 6 5 4 3 2 1 0 $000F SCCR2 SCSR $0010 SCCR1 $000E TRDE TC RDRF IDLE OR NF FE TE SBK $0011 (See note) (See note) R8 T8 M WAKE CPOL CPHA LBCL 0 1 2 4 3 6 5 7 765 2 3 4 1 SCLK pin Wake up unit Receive data shift register Transmit data shift register $0011 Note: The serial communications data register (SCI SCDR) is controlled by the internal R/W signal. It is the transmit data register when written to and the receive data register when read. 7 102 |
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