HC05 datasheet(129/232 Pages) MOTOROLA

129 / 232 page

MC68HC05X16

Rev. 1

MOTOROLA

9-1

ANALOG TO DIGITAL CONVERTER

The analog to digital converter system consists of a single 8-bit successive approximation

converter and a sixteen channel multiplexer. Eight of the channels are connected to the

PD0/AN0 – PD7/AN7 pins of the MC68HC05X16 and the other eight channels are dedicated to

internal reference points for test functions. The channel input pins do not have any internal output

driver circuitry connected to them because such circuitry would load the analog input signals due

to output buffer leakage current. There is one 8-bit result data register (address $08) and one 8-bit

status/control register (address $09).

The A/D converter is ratiometric and two dedicated pins, VRH and VRL, are used to supply the

reference voltage levels for all analog inputs. These pins are used in preference to the system

power supply lines because any voltage drops in the bonding wires of the heavily loaded supply

pins could degrade the accuracy of the A/D conversion. An input voltage equal to or greater than

VRH converts to $FF (full scale) with no overﬂow indication and an input voltage equal to VRL

converts to $00.

The A/D converter can operate from either the bus clock or an internal RC type oscillator. The

internal RC type oscillator is activated by the ADRC bit in the A/D status/control register (ADSTAT)

and can be used to give a sufﬁciently high clock rate to the A/D converter when the bus speed is too

low to provide accurate results. When the A/D converter is not being used it can be disconnected,

by clearing the ADON bit in the ADSTAT register, in order to save power (see Section 9.2.3).

For further information on A/D converter operation please refer to the M68HC11 Reference

Manual — M68HC11RM/AD.

9.1

A/D converter operation

The A/D converter consists of an analog multiplexer, an 8-bit digital to analog converter capacitor

array, a comparator and a successive approximation register (SAR) (see Figure 9-1).

There are eleven options that can be selected by the multiplexer; AN0–AN7, VRH, (VRH+VRL)/2

or VRL. Selection is done via the CHx bits in the ADSTAT register (see Section 9.2.3). AN0–AN7

are the only input points for A/D conversion operations; the others are reference points that can be

used for test purposes.

127

HC05 Datasheet(PDF) 129 Page - Motorola, Inc