HC05 datasheet(154/232 Pages) MOTOROLA

154 / 232 page

MOTOROLA

11-6

MC68HC05X16

Rev. 1

CPU CORE AND INSTRUCTION SET

Table 11-3 Branch instructions

Relative addressing mode

Function

Mnemonic

Opcode

# Bytes # Cycles

Branch always

BRA

Branch never

BRN

Branch if higher

BHI

Branch if lower or same

BLS

Branch if carry clear

BCC

(Branch if higher or same)

(BHS)

Branch if carry set

BCS

(Branch if lower)

(BLO)

Branch if not equal

BNE

Branch if equal

BEQ

Branch if half carry clear

BHCC

Branch if half carry set

BHCS

Branch if plus

BPL

Branch if minus

BMI

Branch if interrupt mask bit is clear

BMC

Branch if interrupt mask bit is set

BMS

Branch if interrupt line is low

BIL

Branch if interrupt line is high

BIH

Branch to subroutine

BSR

Table 11-4 Bit manipulation instructions

Addressing modes

Bit set/clear

Bit test and branch

Function

Mnemonic

Opcode

# Bytes # Cycles

Opcode

# Bytes # Cycles

Branch if bit n is set

BRSET n (n=0–7)

2•n

Branch if bit n is clear

BRCLR n (n=0–7)

01+2•n

Set bit n

BSET n (n=0–7)

10+2•n

Clear bit n

BCLR n (n=0–7)

11+2•n

152

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