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AD9173 Datasheet(PDF) 103 Page - Analog Devices

Part # AD9173
Description  Dual, 16-Bit, 12.6 GSPS RF DAC with Channelizers
PDF  144 Pages
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Manufacturer  AD [Analog Devices]
Direct Link  http://www.analog.com
Logo AD - Analog Devices

AD9173 Datasheet(HTML) 103 Page - Analog Devices

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Data Sheet
AD9173
REGISTER DETAILS
analog.com
Rev. C | 103 of 144
Table 60. Register Details
Addr.
Name
Bits
Bit Name
Settings
Description
Reset
Access
0x146
CHNL_GAIN0
[7:0]
CHNL_GAIN[7:0]
Sets the scalar channel gain value. This control
is paged by the CHANNEL_PAGE bits in Register
0x008. Channel gain = CHNL_GAIN/211.
0x0
R/W
0x147
CHNL_GAIN1
[7:4]
RESERVED
Reserved.
0x0
R
[3:0]
CHNL_GAIN[11:8]
Sets the scalar channel gain value. This control
is paged by the CHANNEL_PAGE bits in Register
0x008. Channel gain = CHNL_GAIN/211.
0x8
R/W
0x148
DC_CAL_TONE0
[7:0]
DC_TEST_INPUT_
AMPLITUDE[7:0]
DC test tone amplitude. This amplitude goes to both I
and Q paths. Set these bits to 0x50FF for a full-scale
tone and ensure DDSC_EN_DC_INPUT in Register
0x130 Bit 0 is set to 1. This control is paged by the
CHANNEL_PAGE control in Register 0x008.
0x0
R/W
0x149
DC_CAL_TONE1
[7:0]
DC_TEST_INPUT_
AMPLITUDE[15:8]
DC test tone amplitude. This amplitude goes to both I
and Q paths. Set to 0x50FF for a full-scale tone and
ensure that DDSC_EN_DC_INPUT (Register 0x130,
Bit 0) is set to 1. This control is paged by the
CHANNEL_PAGE bits in Register 0x008.
0x0
R/W
0x14B
PRBS
7
PRBS_GOOD_Q
DAC1 good data indicator.
0x0
R
1
Correct PRBS sequence detected.
0
Incorrect sequence detected. Sticky; reset to 1 by
PRBS_RESET.
6
PRBS_GOOD_I
DAC0 good data indicator.
0x0
R
0
Incorrect sequence detected. Sticky; reset to 1 by
PRBS_RESET.
1
Correct PRBS sequence detected.
5
RESERVED
Reserved.
0x0
R
4
PRBS_INV_Q
DAC1 data inversion.
0x1
R/W
0
Expect normal data.
1
Expect inverted data.
3
PRBS_INV_I
DAC0 data inversion.
0x0
R/W
0
Expect normal data.
1
Expect inverted data.
2
PRBS_MODE
Select which PRBS polynomial is used for the
datapath PRBS test.
0x0
R/W
0
7-bit: x7 + x6 + 1.
1
15-bit: x15 + x14 + 1.
1
PRBS_RESET
Reset error counters.
0x0
R/W
0
Normal operation.
1
Reset counters.
0
PRBS_EN
Enable PRBS checker.
0x0
R/W
0
Disable.
1
Enable.
0x14C
PRBS_ERROR_I
[7:0]
PRBS_COUNT_I
DAC0 PRBS error count.
0x0
R
0x14D
PRBS_ERROR_Q
[7:0]
PRBS_COUNT_Q
DAC1 PRBS error count.
0x0
R
0x14E
PRBS_CHANSEL
[7:3]
RESERVED
Reserved.
0x0
R
[2:0]
PRBS_CHANSEL
Selects the channel to which the PRBS_
0x7
R/W
GOOD_x and PRBS_COUNT_x bit field readbacks
correspond.
0
Select Channel 0 for PRBS_COUNT_x and
PRBS_GOOD_x (Channel 0, DAC0).



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