HC05 datasheet(111/232 Pages) MOTOROLA

111 / 232 page

MC68HC05X16

Rev. 1

MOTOROLA

7-9

SERIAL COMMUNICATIONS INTERFACE

7.10

SCI synchronous transmission

The SCI transmitter allows the user to control a one way synchronous serial transmission. The

SCLK pin is the clock output of the SCI transmitter. No clocks are sent to that pin during start bit

and stop bit. Depending on the state of the LBCL bit (bit 0 of SCCR1), clocks will or will not be

activated during the last valid data bit (address mark). The CPOL bit (bit 2 of SCCR1) allows the

user to select the clock polarity, and the CPHA bit (bit 1 of SCCR1) allows the user to select the

phase of the external clock (see Figure 7-8, Figure 7-9 and Figure 7-10).

During idle, preamble and send break, the external SCLK clock is not activated.

These options allow the user to serially control peripherals which consist of shift registers, without

losing any functions of the SCI transmitter which can still talk to other SCI receivers. These options

do not affect the SCI receiver which is independent of the transmitter.

The SCLK pin works in conjunction with the TDO pin. When the SCI transmitter is disabled

(TE = 0), the SCLK and TDO pins go to the high impedance state.

Note:

The LBCL, CPOL and CPHA bits have to be selected before enabling the transmitter to

ensure that the clocks function correctly. These bits should not be changed while the

transmitter is enabled.

Figure 7-8 SCI example of synchronous and asynchronous transmission

RDI

TDO

SCLK

Output port

Data out

Data in

Clock

Enable

Asynchronous

MC68HC05X16

(e.g. Modem)

Synchronous

(e.g. shift register,

display driver, etc.)

109

HC05 Datasheet(PDF) 111 Page - Motorola, Inc