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AD9559PCBZ Datasheet(PDF) 58 Page - Analog Devices

Part # AD9559PCBZ
Description  Dual PLL, Quad Input, Multiservice Line Card Adaptive Clock Translator
PDF  120 Pages
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Manufacturer  AD [Analog Devices]
Direct Link  http://www.analog.com
Logo AD - Analog Devices

AD9559PCBZ Datasheet(HTML) 58 Page - Analog Devices

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AD9559
Data Sheet
Rev. 0 | Page 58 of 120
POWER SUPPLY PARTITIONS
The AD9559 power supplies are in two groups: VDD3 and VDD. All
power and ground pins should be connected, even if certain blocks
of the chip are powered down.
Ferrite beads with low (< 0.7 Ω) dc resistance and approximately 600 Ω
impedance at 100 MHz are suitable for this application.
3.3 V SUPPLIES
All of the 3.3 V supplies can be supplied from one 3.3V power supply.
Pin 28 is a serial port power supply and does not require a ferrite
bead from the 3.3 V source.
Pin 1, Pin 12, Pin 18, and Pin 72 belong to PLL_0. It is advisable, but
not mandatory, to have a place for a ferrite bead to isolate them from
the 3.3 V source. The need for a ferrite bead depends on how quiet the
3.3 V source is. This group of pins never consumes more than 90 mA.
Pin 37, Pin 43, Pin 54, and Pin 55 belong to PLL_1, and the same
recommendation given for the PLL_0 3.3 V pins applies here as well.
1.8 V SUPPLIES
All of the 1.8 V supplies can be connected to one common
1.8 V source.
Six ferrite beads should be used in the following locations:
•
Between the 1.8 V source and Pin 13
•
Between the 1.8 V source and Pin 14
•
Between the 1.8 V source and Pin 17
•
Between the 1.8 V source and Pin 38
•
Between the 1.8 V source and Pin 41
•
Between the 1.8 V source and Pin 42
The remaining VDD pins can be connected directly to the
1.8 V source.
BYPASS CAPACITORS FOR PIN 21 AND PIN 33
The performance of the AD9559 is enhanced by the use of a
Size 0201, 0.1 µF capacitor between Pin 21 and Pin 22, as well as
between Pin 33 and Pin 34, placed as close to the AD9559 as
possible and without the use of vias.



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