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AD9559PCBZ Datasheet(PDF) 73 Page - Analog Devices

Part # AD9559PCBZ
Description  Dual PLL, Quad Input, Multiservice Line Card Adaptive Clock Translator
PDF  120 Pages
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Manufacturer  AD [Analog Devices]
Direct Link  http://www.analog.com
Logo AD - Analog Devices

AD9559PCBZ Datasheet(HTML) 73 Page - Analog Devices

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Data Sheet
AD9559
Rev. 0 | Page 73 of 120
USER SCRATCHPAD (REGISTER 0x000E AND REGISTER 0x000F)
Table 39. User Scratchpad
Address
Bits
Bit Name
Description
0x000E
[7:0]
User scratchpad, Bits[7:0]
User programmable EEPROM ID registers. These registers enable users to write a unique
code of their choosing to keep track of revisions to the EEPROM register loading. It has no
effect on part operation.
Default = 0x0000.
0x000F
[7:0]
User scratchpad, Bits[15:8]
GENERAL CONFIGURATION (REGISTER 0x0100 TO REGISTER 0x0109)
Multifunction Pin Control (M0 to M5) and Watchdog Timer
Table 40. Multifunction Pins (M0 to M5) Control
Address
Bits
Bit Name
Description
0x0100
[7:6]
M3 driver mode, Bits[1:0]
00 (default) = active high CMOS.
01 = active low CMOS.
10 = open-drain PMOS (requires an external pull-down resistor).
11 = open-drain NMOS (requires an external pull-up resistor).
[5:4]
M2 driver mode, Bits[1:0]
The settings of these bits are identical to Register 0x0100[7:6].
[3:2]
M1 driver mode, Bits[1:0]
The settings of these bits are identical to Register 0x0100[7:6].
[1:0]
M0 driver mode, Bits[1:0]
The settings of these bits are identical to Register 0x0100[7:6].
0x0101
[7:4]
Reserved
Reserved.
[3:2]
M5 driver mode, Bits[1:0]
The settings of these bits are identical to Register 0x0100[7:6]. Note that, for this pin to be
an M pin, either I²C or 2-wire SPI mode must be enabled.
[1:0]
M4 driver mode, Bits[1:0]
The settings of these bits are identical to Register 0x0100[7:6].
Note that, for this pin to be an M pin, 4-wire SPI mode must be disabled.
0x0102
7
M0 output/
A
inputE
Input/output control for M0 pin.
0 (default) = input (control pin)
1 = output (status pin)
[6:0]
M0 function
These bits control the function of the M0 pin. See Table 196 and Table 197 for details
about the input and output functions that are available.
Default: 0x00 = high impedance control pin, no function assigned.
0x0103
7
M1 output/
A
inputE
Input/output control for M1 pin (same as for the M0 pin).
[6:0]
M1 function
These bits control the function of the M1 pin and are the same as Register 0x0102[6:0].
Default: 0x00 = high impedance control pin, no function assigned.
0x0104
7
M2 output/
A
inputE
Input/output control for M2 pin (same as for the M0 pin).
[6:0]
M2 function
These bits control the function of the M2 pin and are the same as Register 0x0102[6:0].
Default: 0x00 = high impedance control pin, no function assigned.
0x0105
7
M3 output/
A
inputE
Input/output control for M3 pin (same as for the M0 pin).
[6:0]
M3 function
These bits control the function of the M3 pin and are the same as Register 0x0102[6:0].
Default: 0x00 = high impedance control pin, no function assigned.
0x0106
7
M4 output/
A
inputE
Input/output control for M3 pin (same as for the M0 pin).
[6:0]
M4 function
These bits control the function of the M4 pin and are the same as Register 0x0102[6:0].
Default: 0x00 = high impedance control pin, no function assigned.
0x0107
7
M5 output/
A
inputE
Input/output control for M3 pin (same as for the M0 pin).
[6:0]
M5 function
These bits control the function of the M5 pin and are the same as Register 0x0102[6:0].
Default: 0x00 = high impedance control pin, no function assigned.
0x0108
[7:0]
Watchdog timer
(in units of ms)
Watchdog timer, Bits[7:0]. The watchdog timer stops when this register is written, and
restarts on the next IO_UPDATE (Register 0x0005 = 0x01).
Default: 0x00 (0x0000 = disabled).
0x0109
[7:0]
Watchdog timer, Bits[15:8]. The watchdog timer stops when this register is written, and
restarts on the next IO_UPDATE (Register 0x0005 = 0x01).
Default: 0x00.



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