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AD9559PCBZ Datasheet(PDF) 20 Page - Analog Devices |
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AD9559PCBZ Datasheet(HTML) 20 Page - Analog Devices |
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20 / 120 page  AD9559 Data Sheet Rev. 0 | Page 20 of 120 TYPICAL PERFORMANCE CHARACTERISTICS fR = input reference clock frequency; fOUT = output clock frequency; fSYS = SYSCLK input frequency; VDD3 and VDD at nominal supply voltage. –160 –150 –140 –130 –120 –110 –100 –90 –80 –70 –60 1k 10 100 10k 100k 1M 10M 100M FREQUENCY OFFSET (Hz) INTEGRATED RMS JITTER (12kHz TO 20MHz): 331fs PHASE NOISE (dBc/Hz): OFFSET LEVEL 10Hz –75 100Hz –92 1kHz –116 10kHz –126 100kHz –130 1MHz –143 10MHz –152 FLOOR –158 Absolute Phase Noise (Output Driver = HSTL), fR = 19.44 MHz, fOUT = 156.25 MHz, DPLL Loop BW = 50 Hz, fSYS = 49.152 MHz Crystal –160 –150 –140 –130 –120 –110 –100 –90 –80 –70 –60 1k 10 100 10k 100k 1M 10M 100M FREQUENCY OFFSET (Hz) INTEGRATED RMS JITTER (12kHz TO 20MHz): 310fs PHASE NOISE (dBc/Hz): OFFSET LEVEL 10Hz –71 100Hz –82 1kHz –105 10kHz –114 100kHz –117 1MHz –133 10MHz –142 FLOOR –153 Figure 3. Absolute Phase Noise (Output Driver = HSTL), fR = 19.44 MHz, fOUT = 622.08 MHz, DPLL Loop BW = 50 Hz, fSYS = 49.152 MHz Crystal –160 –150 –140 –130 –120 –110 –100 –90 –80 –70 –60 FREQUENCY OFFSET (Hz) 1k 10 100 10k 100k 1M 10M 100M INTEGRATED RMS JITTER (12kHz TO 20MHz): 306fs PHASE NOISE (dBc/Hz): 10Hz –70 100Hz –86 1kHz –105 10kHz –114 100kHz –117 1MHz –134 10MHz –141 FLOOR –153 Figure 4. Absolute Phase Noise (Output Driver = HSTL), fR = 19.44 MHz, fOUT = 644.53125 MHz, DPLL Loop BW = 50 Hz, fSYS = 49.152 MHz Crystal –160 –150 –140 –130 –120 –110 –100 –90 –80 –70 –60 FREQUENCY OFFSET (Hz) 1k 10 100 10k 100k 1M 10M 100M INTEGRATED RMS JITTER (12kHz TO 20MHz): 328fs PHASE NOISE (dBc/Hz): OFFSET LEVEL 10Hz –70 100Hz –85 1kHz –105 10kHz –112 100kHz –115 1MHz –133 10MHz –142 Figure 5. Absolute Phase Noise (Output Driver = HSTL), fR = 19.44 MHz, fOUT = 693.482991 MHz, DPLL Loop BW = 50 Hz, fSYS = 49.152 MHz Crystal |
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