AD9559PCBZ datasheet(91/120 Pages) AD

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Data Sheet

AD9559

Rev. 0 | Page 91 of 120

DPLL_1 CONTROLS (REGISTER 0x0500 TO REGISTER 0x0515)

Table 108. DPLL_1 Free Run Frequency Tuning Word

Address

Bits

Bit Name

Description

0x0500

[7:0]

30-bit free running frequency tuning word

Free running frequency tuning word, Bits[7:0] (default: 0x12)

0x0501

[7:0]

Free running frequency tuning word, Bits[15:8] (default: 0x15)

0x0502

[7:0]

Free running frequency tuning word, Bits[23:9] (default: 0x64)

0x0503

[7:6]

Reserved

Default: 00b

[5:0]

30-bit free running frequency word

Free running frequency tuning word, Bits[29:24] (default: 0x1B)

Table 109. DPLL_1 Digital Oscillator Control

Address

Bits

Bit Name

Description

0x0504

[7:5]

Reserved

Default: 0x0

[4:0]

Digital oscillator SDM integer part

0000 to 0011 = invalid

0100 = divide-by-4

0101 = invalid

0110 = divide-by-6

0111 = divide-by-7

1000 = divide-by-8 (default)

1001 = divide-by-9

1010 = divide-by-10

1011 = divide-by-11

1100 = divide-by-12

1101 = divide-by-13

1110 = divide-by-14

1111 = divide-by-15

Table 110. DPLL_1 Frequency Clamp

Address

Bits

Bit Name

Description

0x0505

[7:0]

Lower limit of pull-in range

(expressed as a 20-bit frequency

tuning word)

Lower limit pull-in range, Bits[7:0]

Default: 0x51

0x0506

[7:0]

Lower limit pull-in range, Bits[15:8]

Default: 0xB8

0x0507

[7:4]

Reserved

Default: 0x0

[3:0]

Lower limit of pull-in range

Lower limit pull-in range, Bits[19:16]

Default: 0x2

0x0508

[7:0]

Upper limit of pull-in range

(expressed as a 20-bit frequency

tuning word)

Upper limit pull-in range, Bits[7:0]

Default: 0x3E

0x0509

[7:0]

Upper limit pull-in range, Bits[15:8]

Default: 0x0A

0x050A

[7:4]

Reserved

Default: 0x0

[3:0]

Upper limit of pull-in range

Upper limit pull-in range, Bits[19:16]

Default: 0xB

Table 111. DPLL_1 History Accumulation Timer

Address

Bits

Bit Name

Description

0x050B

[7:0]

History accumulation timer

(expressed in units of ms)

History accumulation timer, Bits[7:0].

Default: 0x0A.

For Register 0x050B and Register 0x050C, 0x000A = 10 ms. Maximum: 65 sec.

This register controls the amount of tuning word averaging used to

determine the tuning word used in holdover. Never program a timer value of 0.

Default value: 0x000A = 10 (10 ms).

0x050C

[7:0]

History accumulation timer, Bits[15:8].

Default: 0x00.

AD9559PCBZ Datasheet(PDF) 91 Page - Analog Devices

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