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AD9559PCBZ Datasheet(PDF) 25 Page - Analog Devices |
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AD9559PCBZ Datasheet(HTML) 25 Page - Analog Devices |
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25 / 120 page ![]() Data Sheet AD9559 Rev. 0 | Page 25 of 120 –30 –27 –24 –21 –18 –15 –12 –9 –6 –3 0 3 10 100 1k 10k 100k FREQUENCY OFFSET (Hz) LOOP BW = 100Hz; HIGH PHASE MARGIN; PEAKING: 0.06dB; –3dB: 69Hz LOOP BW = 2kHz; HIGH PHASE MARGIN; PEAKING: 0.097dB; –3dB: 1.23kHz LOOP BW = 5kHz; HIGH PHASE MARGIN; PEAKING: 0.14dB; –3dB: 4.27kHz Figure 27. Closed-Loop Transfer Function for 100 Hz, 2 kHz, and 5 kHz Loop Bandwidth Settings; High Phase Margin Loop Filter Setting (This figure is compliant with Telcordia GR-253 jitter transfer test for loop bandwidths < 2 kHz.) Note that bandwidth is defined as the point where the open loop gain = 0 dB. –30 –27 –24 –21 –18 –15 –12 –9 –6 –3 0 3 10 100 1k FREQUENCY OFFSET (Hz) 10k 100k LOOP BW = 100Hz; NORMAL PHASE MARGIN; PEAKING: 0.09dB; –3dB: 117Hz LOOP BW = 2kHz; NORMAL PHASE MARGIN; PEAKING: 1.6dB; –3dB: 2.69kHz Figure 28. Closed-Loop Transfer Function for 100 Hz and 2 kHz Loop Bandwidth Settings; Normal Phase Margin Loop Filter Setting Note that bandwidth is defined as the point where the open loop gain = 0 dB. |
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