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AD9559PCBZ Datasheet(PDF) 24 Page - Analog Devices

Part # AD9559PCBZ
Description  Dual PLL, Quad Input, Multiservice Line Card Adaptive Clock Translator
PDF  120 Pages
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Manufacturer  AD [Analog Devices]
Direct Link  http://www.analog.com
Logo AD - Analog Devices

AD9559PCBZ Datasheet(HTML) 24 Page - Analog Devices

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AD9559
Data Sheet
Rev. 0 | Page 24 of 120
0
10
20
30
40
50
60
80
70
0
200
180
160
140
120
100
80
60
40
20
FREQUENCY (MHz)
1.8V CMOS
3.3V CMOS WEAK
3.3V CMOS STRONG
Figure 21. Power Consumption vs. Frequency for Two CMOS Drivers;
Power Is Measured on Output Driver Power Supply Only
(Pin 17, Pin 21, Pin 34, and Pin 38 for 1.8 V CMOS Mode or
on Pin 18 and Pin 37 for 3.3 V CMOS Mode); CLOAD = 80 pF
–1.0
–0.8
–0.6
–0.4
–0.2
0
0.2
0.4
0.6
0.8
1.0
–1
0
1
2
3
4
5
TIME (ns)
Figure 22. Output Waveform, HSTL (400 MHz)
–0.4
–0.3
–0.2
–0.1
0
0.1
0.2
0.3
0.4
–1
0
1
2
3
4
TIME (ns)
Figure 23. Output Waveform, LVDS (400 MHz)
–0.2
0.2
0.6
1.0
1.4
1.8
2.2
2.6
3.0
3.4
–1
0
1
2
3
4
5
6
7
8
9
10 11 12 13 14 15
TIME (ns)
10pF LOAD
2pF LOAD
Figure 24. Output Waveform,
3.3 V CMOS (100 MHz, Strong Mode)
–1
0
1
2
3
4
5
6
7
8
9
10 11 12 13 14 15
TIME (ns)
–0.1
0.1
0.3
0.5
0.7
0.9
1.1
1.3
1.5
1.7
1.9
10pF LOAD
2pF LOAD
Figure 25. Output Waveform, 1.8 V CMOS (100 MHz)
0
0.4
0.8
1.2
1.6
2.0
2.4
2.8
3.2
–5
5
15
25
35
45
55
65
75
85
95
TIME (ns)
10pF LOAD
2pF LOAD
Figure 26. Output Waveform, 3.3 V CMOS (20 MHz, Weak Mode)



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