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AD9559PCBZ Datasheet(PDF) 70 Page - Analog Devices

Part # AD9559PCBZ
Description  Dual PLL, Quad Input, Multiservice Line Card Adaptive Clock Translator
PDF  120 Pages
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Manufacturer  AD [Analog Devices]
Direct Link  http://www.analog.com
Logo AD - Analog Devices

AD9559PCBZ Datasheet(HTML) 70 Page - Analog Devices

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AD9559
Data Sheet
Rev. 0 | Page 70 of 120
Reg
Addr
(Hex)
Opt
Name
D7
D6
D5
D4
D3
D2
D1
D0
Def
(Hex)
PLL_1 Read-Only Status (To show the latest status, these registers require an IO_UPDATE before being read.)
0x0D40
R, L
PLL_1
lock status
Reserved
APLL_1 cal
in progress
APLL_1
locked
DPLL_1 freq
lock
DPLL_1
phase lock
PLL_1
all locked
N/A
0x0D41
R
DPLL_1
loop state
Reserved
DPLL_1 active ref, Bits[1:0]
DPLL_1
switching
DPLL_1
holdover
DPLL_1
free run
N/A
0x0D42
R, L
Reserved
DPLL_1
phase slew
limited
DPLL_1
frequency
clamped
DPLL_1
history
available
N/A
0x0D43
R
DPLL_1
holdover
history
DPLL_1 tuning word readback, Bits[7:0]
N/A
0x0D44
R
DPLL_1 tuning word readback, Bits[15:8]
N/A
0x0D45
R
DPLL_1 tuning word readback, Bits[23:16]
N/A
0x0D46
R
Reserved
DPLL_1 tuning word readback, Bits[29:24]
N/A
0x0D47
R
DPLL_1
phase lock
detect
bucket
DPLL_1 phase lock detect bucket level, Bits[7:0]
N/A
0x0D48
R
Reserved
DPLL_1 phase lock detect bucket level, Bits[11:8]
N/A
0x0D49
R
DPLL_1
frequency
lock detect
bucket
DPLL_1 frequency lock detect bucket level, Bits[7:0]
N/A
0x0D4A
R
Reserved
DPLL_1 frequency lock detect bucket level, Bits[11:8]
N/A
Nonvolatile Memory (EEPROM) Control
0x0E00
E
Write
protect
Reserved
Write
enable
0x00
0x0E01
E
Condition
Reserved
Conditional value, Bits[3:0]
0x00
0x0E02
A, E
Save
Reserved
Save to
EEPROM
0x00
0x0E03
A, E
Load
Reserved
Load from
EEPROM
0x00
EEPROM Storage Sequence
0x0E10
User free
run
Command: Set user free run mode
0x98
0x0E11
User
scratchpad
Size of transfer: two bytes
0x01
0x0E12
Starting Address 0x000E
0x00
0x0E13
0x0E
0x0E14
M pins and
IRQ masks
Size of transfer: 19 bytes
0x12
0x0E15
Starting Address 0x0100
0x01
0x0E16
0x00
0x0E17
System
clock
Size of transfer: eight bytes
0x07
0x0E18
Starting Address 0x0200
0x02
0x0E19
0x00
0x0E1A
IO_UPDATE
Command: IO_UPDATE
0x80
0x0E1B
REFA
Size of transfer: 27 bytes
0x1A
0x0E1C
Starting Address 0x0300
0x03
0x0E1D
0x00
0x0E1E
REFB
Size of transfer: 27 bytes
0x1A
0x0E1F
Starting Address 0x0320
0x03
0x0E20
0x20
0x0E21
REFC
Size of transfer: 27 bytes
0x1A
0x0E22
Starting Address 0x0340
0x03
0x0E23
0x40
0x0E24
REFD
Size of transfer: 27 bytes
0x1A
0x0E25
Starting Address 0x0360
0x03
0x0E26
0x60
0x0E27
DPLL_0
general
settings
Size of transfer: 22 bytes
0x15
0x0E28
Starting Address 0x0400
0x04
0x0E29
0x00
0x0E2A
APLL_0
config and
output
drivers
Size of transfer: 15 bytes
0x0E
0x0E2B
Starting Address 0x0420
0x04
0x0E2C
0x20



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