Electronic Components Datasheet Search
  English  ▼

X  

AD9559PCBZ Datasheet(PDF) 85 Page - Analog Devices

Part # AD9559PCBZ
Description  Dual PLL, Quad Input, Multiservice Line Card Adaptive Clock Translator
PDF  120 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Manufacturer  AD [Analog Devices]
Direct Link  http://www.analog.com
Logo AD - Analog Devices

AD9559PCBZ Datasheet(HTML) 85 Page - Analog Devices

Back Button AD9559PCBZ Datasheet HTML 81Page - Analog Devices AD9559PCBZ Datasheet HTML 82Page - Analog Devices AD9559PCBZ Datasheet HTML 83Page - Analog Devices AD9559PCBZ Datasheet HTML 84Page - Analog Devices AD9559PCBZ Datasheet HTML 85Page - Analog Devices AD9559PCBZ Datasheet HTML 86Page - Analog Devices AD9559PCBZ Datasheet HTML 87Page - Analog Devices AD9559PCBZ Datasheet HTML 88Page - Analog Devices AD9559PCBZ Datasheet HTML 89Page - Analog Devices Next Button
Zoom Inzoom in Zoom Outzoom out
 85 / 120 page
background image
Data Sheet
AD9559
Rev. 0 | Page 85 of 120
PLL_0 OUTPUT SYNC AND CLOCK DISTRIBUTION (REGISTER 0x0424 TO REGISTER 0x042E)
Table 82. APLL_0 P0 Divider Settings
Address
Bits
Bit Name
Description
0x0424
[7:4]
Reserved
Default: 0x0
[3:0]
P0 divider divide ratio
0000/0001 = 3
0010 = 4
0011 = 5
0100 = 6 (default)
0101 = 7
0110 = 8
0111 = 9
1000 = 10
1001 = 11
Table 83. Distribution Output Synchronization Settings
Address
Bits
Bit Name
Description
0x0425
[7:3]
Reserved
Default: 00000b
2
Sync source selection
Selects the sync source for the clock distribution output channels.
0 (default) = direct.
1 = active reference.
[1:0]
Automatic sync mode
Auto sync mode.
00 = (default) disabled.
01 = sync on DPLL frequency lock.
10 = sync on DPLL phase lock.
11 = reserved.
0x0426
[7:3]
Reserved
Reserved.
2
APLL_0 locked controlled
sync disable
0 (default) = the clock distribution SYNC function is not enabled until the APLL has
been calibrated and is locked. After APLL calibration and lock, the output clock
distribution sync is armed, and the SYNC function for the clock outputs is under the
control of Register 0x0425.
1 = overrides the lock detector state of the APLL; allows Register 0x0425 to control the
output SYNC function regardless of the APLL lock status.
1
Mask OUT0B sync
Masks the synchronous reset to the OUT0B divider.
0 (default) = unmasked.
1 = masked. Setting this bit asynchronously releases the OUT0B divider from static sync
state, thus allowing the OUT0B divider to toggle. OUT0B ignores all sync events while
this bit is set. Setting this bit does not enable the output drivers connected to this channel.
0
Mask OUT0A sync
Masks the synchronous reset to the OUT0A divider.
0 (default) = unmasked.
1 = masked. Setting this bit asynchronously releases the OUT0A divider from static sync
state, thus allowing the OUT0A divider to toggle. OUT0A ignores all sync events while
this bit is set. Setting this bit does not enable the output drivers connected to this channel.



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100  ...More


Datasheet Download

Go To PDF Page


Link URL



Does ALLDATASHEET help your business so far?  [ DONATE ] 

About Alldatasheet   |   Advertisement   |   Contact us   |   Privacy Policy   |   Link to Datasheet    |   Link Exchange   |   Manufacturer List
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com