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AD6684 Datasheet(PDF) 61 Page - Analog Devices

Part # AD6684
Description  135 MHz Quad IF Receiver
PDF  107 Pages
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Manufacturer  AD [Analog Devices]
Direct Link  http://www.analog.com
Logo AD - Analog Devices

AD6684 Datasheet(HTML) 61 Page - Analog Devices

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Data Sheet
AD6684
Rev. 0 | Page 61 of 107
Table 34. JESD204B Output Configurations for N΄= 16
Number of Virtual
Converters
Supported (Same
Value as M)
JESD204B Quick
Configuration
(0x0570)
JESD204B Serial
Line Rate1
JESD204B Transport Layer Settings2
L
M
F
S
HD
N
N΄
CS
K3
1
0x01
20 × fOUT
1
1
2
1
0
8 to 16
16
0 to 3
Only valid K
values that
are divisible
by 4 are
supported
0x40
10 × fOUT
2
1
1
1
1
8 to 16
16
0 to 3
0x41
10 × fOUT
2
1
2
2
0
8 to 16
16
0 to 3
2
0x0A
40 × fOUT
1
2
4
1
0
8 to 16
16
0 to 3
0x49
20 × fOUT
2
2
2
1
0
8 to 16
16
0 to 3
4
0x13
80 × fOUT
1
4
8
1
0
8 to 16
16
0 to 3
0x52
40 × fOUT
2
4
4
1
0
8 to 16
16
0 to 3
1 fOUT = output sample rate = ADC sample rate/chip decimation ratio. The JESD204B serial line rate must be ≥1687.5 Mbps and ≤15,000 Mbps. When the serial line rate is
≤15 Gbps and ≥13.5 Gbps, set Bits[7:4] to 0x3 in Register 0x056E. When the serial line rate is ≤13.5 Gbps and ≥6.75 Gbps, set Bits[7:4] to 0x0 in Register 0x056E. When
the serial line rate is <6.75 Gbps and ≥3.375 Gbps, set Bits[7:4] to 0x1 in Register 0x056E. When the serial line rate is ≤3.375 Gbps and ≥1687.5 Mbps, set Bits[7:4] to 0x5
in Register 0x056E.
2 JESD204B transport layer descriptions are as described in the JESD204B Overview section.
3 For F = 1, K = 20, 24, 28, and 32. For F = 2, K = 12, 16, 20, 24, 28, and 32. For F = 4, K = 8, 12, 16, 20, 24, 28, and 32. For F = 8 and F = 16, K = 4, 8, 12, 16, 20, 24, 28, and 32.
Table 35. JESD204B Output Configurations for N΄= 8
Number of Virtual
Converters Supported
(Same Value as M)
JESD204B Quick
Configuration
(Register 0x0570)
Serial Line Rate1
JESD204B Transport Layer Settings2
L
M
F
S
HD
N
N΄
CS
K3
1
0x00
10 × fOUT
1
1
1
1
0
7 to 8
8
0 to 1
Only valid K
values which
are divisible
by 4 are
supported
0x01
10 × fOUT
1
1
2
2
0
7 to 8
8
0 to 1
0x40
5 × fOUT
2
1
1
2
0
7 to 8
8
0 to 1
0x41
5 × fOUT
2
1
2
4
0
7 to 8
8
0 to 1
0x42
5 × fOUT
2
1
4
8
0
7 to 8
8
0 to 1
2
0x09
20 × fOUT
1
2
2
1
0
7 to 8
8
0 to 1
0x48
10 × fOUT
2
2
1
1
0
7 to 8
8
0 to 1
0x49
10 × fOUT
2
2
2
2
0
7 to 8
8
0 to 1
1 fOUT = output sample rate = ADC sample rate/chip decimation ratio. The JESD204B serial line rate must be ≥1687.5 Mbps and ≤15,000 Mbps. When the serial line rate is
≤15 Gbps and ≥13.5 Gbps, set Bits[7:4] to 0x3 in Register 0x056E. When the serial line rate is ≤13.5 Gbps and ≥6.75 Gbps, set Bits[7:4] to 0x0 in Register 0x056E. When
the serial line rate is <6.75 Gbps and ≥3.375 Gbps, set Bits[7:4] to 0x1 in Register 0x056E. When the serial line rate is ≤3.375 Gbps and ≥1687.5 Mbps, set Bits[7:4] to 0x5
in Register 0x056E.
2 JESD204B transport layer descriptions are as described in the JESD204B Overview section.
3 For F = 1, K = 20, 24, 28, and 32. For F = 2, K = 12, 16, 20, 24, 28, and 32. For F = 4, K = 8, 12, 16, 20, 24, 28, and 32. For F = 8 and F = 16, K = 4, 8, 12, 16, 20, 24, 28, and 32.



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