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AD6684 Datasheet(PDF) 97 Page - Analog Devices

Part # AD6684
Description  135 MHz Quad IF Receiver
PDF  107 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Manufacturer  AD [Analog Devices]
Direct Link  http://www.analog.com
Logo AD - Analog Devices

AD6684 Datasheet(HTML) 97 Page - Analog Devices

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Data Sheet
AD6684
Rev. 0 | Page 97 of 107
Address
Name
Bits
Bit Name
Settings
Description
Reset
Access
0x0556
Pair map
User Pattern
3 MSB
[7:0]
User Pattern 3[15:8]
User Test Pattern 3 most significant byte
0x0
R/W
0x0557
Pair map
User Pattern
4 LSB
[7:0]
User Pattern 4[7:0]
User Test Pattern 4 least significant byte
0x0
R/W
0x0558
Pair map
User Pattern
4 MSB
[7:0]
User Pattern 4[15:8]
User Test Pattern 4 most significant byte
0x0
R/W
0x0559
Pair map
Output
Control
Mode 0
7
Reserved
Reserved.
0x0
R
[6:4]
Converter Control Bit 1
selection
0x0
R/W
000
Tie low (1'b0).
001
Overrange bit.
010
Signal monitor bit or VDR punish Bit 0.
011
Fast detect (FD) bit or VDR punish Bit 1.
100
VDR high/low resolution bit.
101
SYSREF.
110
Reserved.
111
Reserved.
3
Reserved
Reserved.
0x0
R
[2:0]
Converter Control Bit 0
selection
0x0
R/W
000
Tie low (1'b0)
001
Overrange bit.
010
Signal monitor or VDR punish Bit 0.
011
Fast detect (FD) bit or VDR punish Bit 1.
100
VDR high/low resolution bit.
101
SYSREF.
0x055A
Pair Map
Output
Control
Mode 1
[7:3]
Reserved
Reserved.
0x0
R
[2:0]
Converter control Bit 2
selection
0x1
R/W
000
Tie low (1'b0).
001
Overrange bit.
010
Signal monitor bit or VDR punish Bit 0.
011
Fast detect (FD) bit or VDR punish Bit 1.
100
VDR high/low resolution bit.
101
SYSREF.
110
Reserved.
111
Reserved.
0x0561
Pair map
output
sample
mode
[7:3]
Reserved
Reserved.
0x0
R
2
Sample invert
0x0
R/W
0
ADC sample data is not inverted.
1
ADC sample data is inverted.
[1:0]
Data format select
0x1
R/W
00
Offset binary.
01
Twos complement (default).
0x0564
Pair map
output
channel
select
[7:2]
Reserved
Reserved.
0x0
R
1
Reserved
Reserved.
0x0
R/W
0
Converter channel swap
control
0x0
R/W
0
Normal channel ordering.
1
Channel swap enabled.



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