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AD6684 Datasheet(PDF) 98 Page - Analog Devices

Part # AD6684
Description  135 MHz Quad IF Receiver
PDF  107 Pages
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Manufacturer  AD [Analog Devices]
Direct Link  http://www.analog.com
Logo AD - Analog Devices

AD6684 Datasheet(HTML) 98 Page - Analog Devices

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AD6684
Data Sheet
Rev. 0 | Page 98 of 107
Address
Name
Bits
Bit Name
Settings
Description
Reset
Access
0x056E
JESD204B
map PLL
control
[7:4]
JESD204B lane rate control
0x0
R/W
0000
Lane rate = 6.75 to 13.5 Gbps.
0001
Lane rate = 3.375 Gbps to 6.75 Gbps.
0011
Lane rate = 13.5 to 15 Gbps.
0101
Lane rate = 1.6875 Gbps to 3.375 Gbps.
[3:0]
Reserved
Reserved.
0x0
R
0x056F
JESD204B
map PLL
status
7
PLL lock status
0x0
R
0
Not locked.
1
Locked.
[6:4]
Reserved
Reserved.
0x0
R
3
Reserved
Reserved.
0x0
R
[2:0]
Reserved
Reserved.
0x0
R
0x0570
JESD204B
map JTX
quick
config-
uration
[7:6]
Quick Configuration L
Number of lanes (L) = 2Register0x0570, Bits[7:6]
0x1
R/W
0
L = 1.
1
L = 2.
[5:3]
Quick Configuration M
Number of converters (M) = 2Register0x0570,Bits[5:3]
0x1
R/W
0
M = 1.
1
M = 2.
10
M = 4.
[2:0]
Quick Configuration F
Number of octets/frame (F) =
2Register0x0570,Bits[2:0]
0x1
R/W
0
F = 1.
1
F = 2.
10
F = 4.
11
F = 8.
0x0571
JESD204B
map JTX
Link
Control 1
7
Standby mode
0x0
R/W
0
Standby mode forces zeros for all
converter samples.
1
Standby mode forces code group
synchronization (K28.5 characters).
6
Tail bit (t) PN
0x0
R/W
0
Disable.
1
Enable.
5
Long transport layer test
0x0
R/W
0
JESD204B test samples disabled.
1
JESD204B test samples enabled. The long
transport layer test sample sequence (as
specified in JESD204B Section 5.1.6.3) sent
on all link lanes.
4
Lane synchronization
0x1
R/W
0
Disable FACI uses /K28.7/.
1
Enable FACI uses /K28.3/ and /K28.7/.
[3:2]
ILAS sequence mode
0x1
R/W
00
Initial lane alignment sequence disabled
(see JESD204B Section 5.3.3.5).
01
Initial lane alignment sequence enabled
(see JESD204B Section 5.3.3.5).
11
Initial lane alignment sequence always on
test mode. JESD204B data link layer test
mode where repeated lane alignment
sequence (as specified in JESD204B,
Section 5.3.3.8.2) sent on all lanes.



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