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AD6684 Datasheet(PDF) 81 Page - Analog Devices |
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AD6684 Datasheet(HTML) 81 Page - Analog Devices |
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81 / 107 page ![]() Data Sheet AD6684 Rev. 0 | Page 81 of 107 Reg. Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Reset R/W 0x05C6 JESD204B serializer preempha- sis selection register for Logical Lane 0 Post tab polarity Sets post tab level Pre tab polarty Sets pre tab level 0x0 R/W 0x0922 Large dither control Large dither control 0x70 R/W 0x1222 PLL calibration PLL calibration 0x0 R/W 0x1228 JESD204B start-up circuit reset JESD204B start-up circuit reset 0xF R/W 0x1262 PLL loss of lock control PLL loss of lock control 0x0 R/W 0x18A6 Pair map VREF control Reserved VREF control 0x00 R/W 0x18E0 External VCM Buffer Control 1 External VCM Buffer Control 1 0x00 R/W 0x18E1 External VCM Buffer Control 2 External VCM Buffer Control 1 0x00 R/W 0x18E2 External VCM Buffer Control 3 External VCM Buffer Control 1 0x00 R/W 0x18E3 External VCM buffer control Reserved External VCM buffer External VCM buffer current setting 0x00 R/W 0x18E6 Temp- erature diode export Reserved Temp- erature diode export 0x00 R/W 0x1908 Channel map analog input control Reserved Analog input dc coupling selection Reserved 0x00 R/W 0x1910 Channel map input full- scale range Reserved Input full-scale control 0x0D R/W 0x1A4C Channel Map Buffer Control 1 Reserved Buffer Control 1 0x0C R/W 0x1A4D Channel Map Buffer Control 2 Reserved Buffer Control 2 0x0C R/W |
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