 |
Electronic Components Datasheet Search |
|
|
Electronic Components Datasheet Search |
|
AD9559PCBZ Datasheet(PDF) 109 Page - Analog Devices |
|
|
|||||||||||||||||||||||||||||
AD9559PCBZ Datasheet(HTML) 109 Page - Analog Devices |
|
|
109 / 120 page  Data Sheet AD9559 Rev. 0 | Page 109 of 120 Address Bits Bit Name Description 0x0D09 7 Reserved Reserved 6 REFB validated IRQ indicating that REFB has been validated 5 REFB fault cleared IRQ indicating that REFB has been cleared of a previous fault 4 REFB fault IRQ indicating that REFB has been faulted 3 Reserved Reserved 2 REFA validated IRQ indicating that REFA has been validated 1 REFA fault cleared IRQ indicating that REFA has been cleared of a previous fault 0 REFA fault IRQ indicating that REFA has been faulted 0x0D0A 7 Reserved Reserved 6 REFD validated IRQ indicating that REFD has been validated 5 REFD fault cleared IRQ indicating that REFD has been cleared of a previous fault 4 REFD fault IRQ indicating that REFD has been faulted 3 Reserved Reserved 2 REFC validated IRQ indicating that REFC has been validated 1 REFC fault cleared IRQ indicating that REFC has been cleared of a previous fault 0 REFC fault IRQ indicating that REFC has been faulted Table 169. IRQ Monitor for Digital PLL0 (DPLL_0) Address Bits Bit Name Description 0x0D0B 7 Frequency unclamp IRQ indicating that DPLL_0 has exited a frequency clamped state 6 Frequency clamp IRQ indicating that DPLL_0 has entered a frequency clamped state 5 Phase slew unlimited IRQ indicating that DPLL_0 has exited a phase slew limited state 4 Phase slew limited IRQ indicating that DPLL_0 has entered a phase slew limited state 3 Frequency unlocked IRQ indicating that DPLL_0 has lost frequency lock 2 Frequency locked IRQ indicating that DPLL_0 has acquired frequency lock 1 Phase unlocked IRQ indicating that DPLL_0 has lost phase lock 0 Phase locked IRQ indicating that DPLL_0 has acquired phase lock 0x0D0C 7 DPLL_0 switching IRQ indicating that DPLL_0 is switching to a new reference 6 DPLL_0 free run IRQ indicating that DPLL_0 has entered free run mode 5 DPLL_0 holdover IRQ indicating that DPLL_0 has entered holdover mode 4 History updated IRQ indicating that DPLL_0 has updated its tuning word history 3 REFD activated IRQ indicating that DPLL_0 has activated REFD 2 REFC activated IRQ indicating that DPLL_0 has activated REFC 1 REFB activated IRQ indicating that DPLL_0 has activated REFB 0 REFA activated IRQ indicating that DPLL_0 has activated REFA 0x0D0D [7:5] Reserved Reserved 4 Sync distribution IRQ indicating a distribution sync event 3 APLL_0 unlocked IRQ indicating that APLL_0 has been unlocked 2 APLL_0 locked IRQ indicating that APLL_0 has been locked 1 APLL_0 cal ended IRQ indicating that APLL_0 calibration complete 0 APLL_0 cal started IRQ indicating that APLL_0 calibration started |
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
English ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
